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authorStephen Warren <swarren@nvidia.com>2014-02-03 14:03:26 -0700
committerTom Warren <twarren@nvidia.com>2014-03-05 16:59:08 -0700
commit87fb553b90ab191fd643afa64d0fafd266a808c5 (patch)
treefb22f9f81cd8ea4c386e4602392ca381aa528fe3 /arch/arm
parentf3026c16836b0bdc2b4a170f29005d834a748c5e (diff)
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ARM: tegra: fix NV_PA_CSITE_BASE for Tegra124
Tegra124 moved the CSITE block's base address. Fix U-Boot to use the correct address. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/include/asm/arch-tegra/tegra.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-tegra/tegra.h b/arch/arm/include/asm/arch-tegra/tegra.h
index 5fe19ae..d63af0e 100644
--- a/arch/arm/include/asm/arch-tegra/tegra.h
+++ b/arch/arm/include/asm/arch-tegra/tegra.h
@@ -34,7 +34,12 @@
#define NV_PA_PMC_BASE (NV_PA_APB_MISC_BASE + 0xE400)
#define NV_PA_EMC_BASE (NV_PA_APB_MISC_BASE + 0xF400)
#define NV_PA_FUSE_BASE (NV_PA_APB_MISC_BASE + 0xF800)
+#if defined(CONFIG_TEGRA20) || defined(CONFIG_TEGRA30) || \
+ defined(CONFIG_TEGRA114)
#define NV_PA_CSITE_BASE 0x70040000
+#else
+#define NV_PA_CSITE_BASE 0x70800000
+#endif
#define TEGRA_USB_ADDR_MASK 0xFFFFC000
#define NV_PA_SDRC_CS0 NV_PA_SDRAM_BASE