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authorMaxime Ripard <maxime.ripard@free-electrons.com>2014-10-03 20:16:28 +0800
committerHans de Goede <hdegoede@redhat.com>2014-10-24 09:35:38 +0200
commit7711539734ac71e2156b4b04464dbffa849cd4fc (patch)
treed2a9b9499154e04c8f932b754698a1f80d470e3d /arch/arm
parentba1e40fdd3096d2b9a421ac03285bd49bf837959 (diff)
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ARM: sun6i: Setup the A31 UART0 muxing
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> [wens@csie.org: commit message was "ARM: sunxi: Setup the A31 UART0 muxing"] [wens@csie.org: reorder #ifs by SUN?I] [wens@csie.org: replace magic numbers with GPIO definitions] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/cpu/armv7/sunxi/board.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c
index 95a74c5..b6d63db 100644
--- a/arch/arm/cpu/armv7/sunxi/board.c
+++ b/arch/arm/cpu/armv7/sunxi/board.c
@@ -58,6 +58,10 @@ int gpio_init(void)
sunxi_gpio_set_cfgpin(SUNXI_GPB(19), SUN5I_GPB19_UART0_TX);
sunxi_gpio_set_cfgpin(SUNXI_GPB(20), SUN5I_GPB20_UART0_RX);
sunxi_gpio_set_pull(SUNXI_GPB(20), SUNXI_GPIO_PULL_UP);
+#elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_SUN6I)
+ sunxi_gpio_set_cfgpin(SUNXI_GPH(20), SUN6I_GPH20_UART0_TX);
+ sunxi_gpio_set_cfgpin(SUNXI_GPH(21), SUN6I_GPH21_UART0_RX);
+ sunxi_gpio_set_pull(SUNXI_GPH(21), SUNXI_GPIO_PULL_UP);
#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_SUN5I)
sunxi_gpio_set_cfgpin(SUNXI_GPG(3), SUN5I_GPG3_UART1_TX);
sunxi_gpio_set_cfgpin(SUNXI_GPG(4), SUN5I_GPG4_UART1_RX);