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author | Tom Warren <twarren.nvidia@gmail.com> | 2013-02-27 11:10:01 +0000 |
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committer | Tom Warren <twarren@nvidia.com> | 2013-03-14 11:06:41 -0700 |
commit | 702b87289438cfc3165408f0eaf999b0b67c1e7e (patch) | |
tree | 86f0f95e2bee04bccbaf77982e0a623ec43b5a83 /arch/arm | |
parent | d7a55e1a4b702bffae3e8ed43a5be125a30ba8ab (diff) | |
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Tegra114: I2C: Take DVFS out of reset to allow I2C5 (PWR_I2C) to work
I2C driver can now probe dev 0 (PWR_I2C, where the PMU, etc. lives).
This is needed so that the SDIO slot power can be brought up for
the MMC driver, so it has to precede those commits.
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/cpu/arm720t/tegra114/cpu.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/cpu/arm720t/tegra114/cpu.c b/arch/arm/cpu/arm720t/tegra114/cpu.c index 5962e15..0b2157a 100644 --- a/arch/arm/cpu/arm720t/tegra114/cpu.c +++ b/arch/arm/cpu/arm720t/tegra114/cpu.c @@ -201,6 +201,7 @@ void t114_init_clocks(void) reset_set_enable(PERIPH_ID_MSELECT, 0); reset_set_enable(PERIPH_ID_EMC1, 0); reset_set_enable(PERIPH_ID_MC1, 0); + reset_set_enable(PERIPH_ID_DVFS, 0); debug("t114_init_clocks exit\n"); } |