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| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-04-21 14:43:15 +0900 |
|---|---|---|
| committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-04-24 09:53:57 +0900 |
| commit | 612ccd90012d7c77bbe67ec65f770b9e82fe4a35 (patch) | |
| tree | f95e04d454f99db06ec891ec2db2ca8d14fa9fb5 /arch/arm | |
| parent | 6c64d50e47cbb9f68f53cc67f178d1a09f63b369 (diff) | |
| download | u-boot-imx-612ccd90012d7c77bbe67ec65f770b9e82fe4a35.zip u-boot-imx-612ccd90012d7c77bbe67ec65f770b9e82fe4a35.tar.gz u-boot-imx-612ccd90012d7c77bbe67ec65f770b9e82fe4a35.tar.bz2 | |
ARM: uniphier: add sg_set_iectrl_range()
For PH1-LD20 or later, per-pin input-enable control is supported,
that is, we need to set-up IECTRL registers for a group of pins.
This helper function will be useful for a bunch of register settings.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mach-uniphier/sg-regs.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/mach-uniphier/sg-regs.h b/arch/arm/mach-uniphier/sg-regs.h index 2cdc2db..4044245 100644 --- a/arch/arm/mach-uniphier/sg-regs.h +++ b/arch/arm/mach-uniphier/sg-regs.h @@ -126,6 +126,14 @@ static inline void sg_set_iectrl(unsigned pin) writel(tmp, reg); } +static inline void sg_set_iectrl_range(unsigned min, unsigned max) +{ + int i; + + for (i = min; i <= max; i++) + sg_set_iectrl(i); +} + #endif /* __ASSEMBLY__ */ #endif /* ARCH_SG_REGS_H */ |