diff options
| author | Thierry Reding <treding@nvidia.com> | 2015-07-22 16:44:32 -0600 |
|---|---|---|
| committer | Tom Warren <twarren@nvidia.com> | 2015-07-27 15:54:28 -0700 |
| commit | 502a2aff7637d6522f50839b4d9ac253fcb1ea6e (patch) | |
| tree | f5d3131ae12cc2c46d1af9fcd027757a6d103bb1 /arch/arm | |
| parent | f49357baadb6ff30b5c8a43019e3c655d75b036b (diff) | |
| download | u-boot-imx-502a2aff7637d6522f50839b4d9ac253fcb1ea6e.zip u-boot-imx-502a2aff7637d6522f50839b4d9ac253fcb1ea6e.tar.gz u-boot-imx-502a2aff7637d6522f50839b4d9ac253fcb1ea6e.tar.bz2 | |
arm64: Handle arbitrary CONFIG_SYS_MALLOC_F_LEN values
The encoding of the sub instruction used to handle CONFIG_SYS_MALLOC_F_LEN
can only accept certain values, and the set of acceptable values differs
between the AArch32 and AArch64 instructions sets. The default value of
CONFIG_SYS_MALLOC_F_LEN works with either ISA. Tegra uses a non-default
value that can only be encoded in the AArch32 ISA. Fix the AArch64 crt0
assembly so it can handle completely arbitrary values.
Signed-off-by: Thierry Reding <treding@nvidia.com>
[twarren: trimmed Thierry's patch to remove changes already present]
Signed-off-by: Tom Warren <twarren@nvidia.com>
[swarren, cleaned up patch, wrote description, re-wrote subject]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/lib/crt0_64.S | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S index bc9c53c..98a906e 100644 --- a/arch/arm/lib/crt0_64.S +++ b/arch/arm/lib/crt0_64.S @@ -74,7 +74,8 @@ zero_gd: cmp x0, x18 b.gt zero_gd #if defined(CONFIG_SYS_MALLOC_F_LEN) - sub x0, x18, #CONFIG_SYS_MALLOC_F_LEN + ldr x0, =CONFIG_SYS_MALLOC_F_LEN + sub x0, x18, x0 str x0, [x18, #GD_MALLOC_BASE] #endif bic sp, x0, #0xf /* 16-byte alignment for ABI compliance */ |