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| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-04-21 14:43:20 +0900 |
|---|---|---|
| committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-04-24 09:54:10 +0900 |
| commit | 3d970876db14ca81b8fc66803f4473e719ad1350 (patch) | |
| tree | d84d61cd6b8bd626e34c883dc8eb33f72b2d3297 /arch/arm | |
| parent | 2386969808c1694bb633804aff010294cb7e8573 (diff) | |
| download | u-boot-imx-3d970876db14ca81b8fc66803f4473e719ad1350.zip u-boot-imx-3d970876db14ca81b8fc66803f4473e719ad1350.tar.gz u-boot-imx-3d970876db14ca81b8fc66803f4473e719ad1350.tar.bz2 | |
ARM: dts: uniphier: add SD controller node for PH1-LD20
PH1-LD20 does not support 1.8V signaling for SD card; only Default
Speed and High Speed (up to 50MHz) with 3.3V signaling is supported.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/dts/uniphier-ph1-ld20.dtsi | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm/dts/uniphier-ph1-ld20.dtsi b/arch/arm/dts/uniphier-ph1-ld20.dtsi index fc1c6bf..f9cc3c4 100644 --- a/arch/arm/dts/uniphier-ph1-ld20.dtsi +++ b/arch/arm/dts/uniphier-ph1-ld20.dtsi @@ -226,6 +226,23 @@ reg = <0x59801000 0x400>; }; + mio: mioctrl@59810000 { + compatible = "socionext,ph1-ld20-mioctrl"; + reg = <0x59810000 0x800>; + #clock-cells = <1>; + }; + + sd: sdhc@5a400000 { + compatible = "socionext,uniphier-sdhc"; + status = "disabled"; + reg = <0x5a400000 0x800>; + interrupts = <0 76 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sd>; + clocks = <&mio 0>; + bus-width = <4>; + }; + pinctrl: pinctrl@5f801000 { compatible = "socionext,ph1-ld20-pinctrl", "syscon"; reg = <0x5f801000 0xe00>; |