ARM: uniphier: allow to enable multiple SoCs

Before this commit, the Kconfig menu in mach-uniphier only allowed us
to choose one SoC to be compiled.  Each SoC has its own defconfig file
for the build-test coverage.  Consequently, some defconfig files are
duplicated with only the difference in CONFIG_DEFAULT_DEVICE_TREE and
CONFIG_{SOC_NAME}=y.

Now, most of board-specific parameters have been moved to device trees,
so it makes sense to include init code of multiple SoCs into a single
image as long as the SoCs have similar architecture.  In fact, some
SoCs of UniPhier family are very similar:
 - PH1-LD4 and PH1-sLD8
 - PH1-LD6b and ProXstream2 (will be added in the upcoming commit)

This commit will be helpful to merge some defconfig files for better
maintainability.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

5 files changed, 171 insertions, 0 deletions

diff --git a/arch/arm/mach-uniphier/pinctrl/Makefile b/arch/arm/mach-uniphier/pinctrl/Makefile
new file mode 100644
index 0000000..542c670
--- /dev/null
+++ b/arch/arm/mach-uniphier/pinctrl/Makefile
@@ -0,0 +1,4 @@
+obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3)	+= pinctrl-ph1-sld3.o
+obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4)	+= pinctrl-ph1-ld4.o
+obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4)	+= pinctrl-ph1-pro4.o
+obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8)	+= pinctrl-ph1-sld8.o
diff --git a/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-ld4.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-ld4.c
new file mode 100644
index 0000000..160d3ef
--- /dev/null
+++ b/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-ld4.c
@@ -0,0 +1,49 @@
+/*
+ * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <linux/io.h>
+#include <mach/init.h>
+#include <mach/sg-regs.h>
+
+void ph1_ld4_pin_init(void)
+{
+	u32 tmp;
+
+	/* Comment format:    PAD Name -> Function Name */
+
+#ifdef CONFIG_NAND_DENALI
+	sg_set_pinsel(158, 0, 8, 4);	/* XNFRE -> XNFRE_GB */
+	sg_set_pinsel(159, 0, 8, 4);	/* XNFWE -> XNFWE_GB */
+	sg_set_pinsel(160, 0, 8, 4);	/* XFALE -> NFALE_GB */
+	sg_set_pinsel(161, 0, 8, 4);	/* XFCLE -> NFCLE_GB */
+	sg_set_pinsel(162, 0, 8, 4);	/* XNFWP -> XFNWP_GB */
+	sg_set_pinsel(163, 0, 8, 4);	/* XNFCE0 -> XNFCE0_GB */
+	sg_set_pinsel(164, 0, 8, 4);	/* NANDRYBY0 -> NANDRYBY0_GB */
+	sg_set_pinsel(22, 0, 8, 4);	/* MMCCLK  -> XFNCE1_GB */
+	sg_set_pinsel(23, 0, 8, 4);	/* MMCCMD  -> NANDRYBY1_GB */
+	sg_set_pinsel(24, 0, 8, 4);	/* MMCDAT0 -> NFD0_GB */
+	sg_set_pinsel(25, 0, 8, 4);	/* MMCDAT1 -> NFD1_GB */
+	sg_set_pinsel(26, 0, 8, 4);	/* MMCDAT2 -> NFD2_GB */
+	sg_set_pinsel(27, 0, 8, 4);	/* MMCDAT3 -> NFD3_GB */
+	sg_set_pinsel(28, 0, 8, 4);	/* MMCDAT4 -> NFD4_GB */
+	sg_set_pinsel(29, 0, 8, 4);	/* MMCDAT5 -> NFD5_GB */
+	sg_set_pinsel(30, 0, 8, 4);	/* MMCDAT6 -> NFD6_GB */
+	sg_set_pinsel(31, 0, 8, 4);	/* MMCDAT7 -> NFD7_GB */
+#endif
+
+#ifdef CONFIG_USB_EHCI_UNIPHIER
+	sg_set_pinsel(53, 0, 8, 4);	/* USB0VBUS -> USB0VBUS */
+	sg_set_pinsel(54, 0, 8, 4);	/* USB0OD   -> USB0OD */
+	sg_set_pinsel(55, 0, 8, 4);	/* USB1VBUS -> USB1VBUS */
+	sg_set_pinsel(56, 0, 8, 4);	/* USB1OD   -> USB1OD */
+	/* sg_set_pinsel(67, 23, 8, 4); */ /* PCOE -> USB2VBUS */
+	/* sg_set_pinsel(68, 23, 8, 4); */ /* PCWAIT -> USB2OD */
+#endif
+
+	tmp = readl(SG_IECTRL);
+	tmp |= 0x41;
+	writel(tmp, SG_IECTRL);
+}
diff --git a/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-pro4.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-pro4.c
new file mode 100644
index 0000000..f50644c
--- /dev/null
+++ b/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-pro4.c
@@ -0,0 +1,50 @@
+/*
+ * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <linux/io.h>
+#include <mach/init.h>
+#include <mach/sg-regs.h>
+
+void ph1_pro4_pin_init(void)
+{
+	/* Comment format:    PAD Name -> Function Name */
+
+#ifdef CONFIG_NAND_DENALI
+	sg_set_pinsel(40, 0, 4, 8);	/* NFD0   -> NFD0 */
+	sg_set_pinsel(41, 0, 4, 8);	/* NFD1   -> NFD1 */
+	sg_set_pinsel(42, 0, 4, 8);	/* NFD2   -> NFD2 */
+	sg_set_pinsel(43, 0, 4, 8);	/* NFD3   -> NFD3 */
+	sg_set_pinsel(44, 0, 4, 8);	/* NFD4   -> NFD4 */
+	sg_set_pinsel(45, 0, 4, 8);	/* NFD5   -> NFD5 */
+	sg_set_pinsel(46, 0, 4, 8);	/* NFD6   -> NFD6 */
+	sg_set_pinsel(47, 0, 4, 8);	/* NFD7   -> NFD7 */
+	sg_set_pinsel(48, 0, 4, 8);	/* NFALE  -> NFALE */
+	sg_set_pinsel(49, 0, 4, 8);	/* NFCLE  -> NFCLE */
+	sg_set_pinsel(50, 0, 4, 8);	/* XNFRE  -> XNFRE */
+	sg_set_pinsel(51, 0, 4, 8);	/* XNFWE  -> XNFWE */
+	sg_set_pinsel(52, 0, 4, 8);	/* XNFWP  -> XNFWP */
+	sg_set_pinsel(53, 0, 4, 8);	/* XNFCE0 -> XNFCE0 */
+	sg_set_pinsel(54, 0, 4, 8);	/* NRYBY0 -> NRYBY0 */
+	/* sg_set_pinsel(131, 1, 4, 8); */	/* RXD2   -> NRYBY1 */
+	/* sg_set_pinsel(132, 1, 4, 8); */	/* TXD2   -> XNFCE1 */
+#endif
+
+#ifdef CONFIG_USB_XHCI_UNIPHIER
+	sg_set_pinsel(180, 0, 4, 8);	/* USB0VBUS -> USB0VBUS */
+	sg_set_pinsel(181, 0, 4, 8);	/* USB0OD   -> USB0OD */
+	sg_set_pinsel(182, 0, 4, 8);	/* USB1VBUS -> USB1VBUS */
+	sg_set_pinsel(183, 0, 4, 8);	/* USB1OD   -> USB1OD */
+#endif
+
+#ifdef CONFIG_USB_EHCI_UNIPHIER
+	sg_set_pinsel(184, 0, 4, 8);	/* USB2VBUS -> USB2VBUS */
+	sg_set_pinsel(185, 0, 4, 8);	/* USB2OD   -> USB2OD */
+	sg_set_pinsel(187, 0, 4, 8);	/* USB3VBUS -> USB3VBUS */
+	sg_set_pinsel(188, 0, 4, 8);	/* USB3OD   -> USB3OD */
+#endif
+
+	writel(1, SG_LOADPINCTRL);
+}
diff --git a/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-sld3.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-sld3.c
new file mode 100644
index 0000000..f1b2bbb
--- /dev/null
+++ b/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-sld3.c
@@ -0,0 +1,25 @@
+/*
+ * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <mach/init.h>
+#include <mach/sg-regs.h>
+
+void ph1_sld3_pin_init(void)
+{
+#ifdef CONFIG_USB_EHCI_UNIPHIER
+	sg_set_pinsel(13, 0, 4, 4);	/* USB0OC */
+	sg_set_pinsel(14, 1, 4, 4);	/* USB0VBUS */
+
+	sg_set_pinsel(15, 0, 4, 4);	/* USB1OC */
+	sg_set_pinsel(16, 1, 4, 4);	/* USB1VBUS */
+
+	sg_set_pinsel(17, 0, 4, 4);	/* USB2OC */
+	sg_set_pinsel(18, 1, 4, 4);	/* USB2VBUS */
+
+	sg_set_pinsel(19, 0, 4, 4);	/* USB3OC */
+	sg_set_pinsel(20, 1, 4, 4);	/* USB3VBUS */
+#endif
+}
diff --git a/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-sld8.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-sld8.c
new file mode 100644
index 0000000..f936a53
--- /dev/null
+++ b/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-sld8.c
@@ -0,0 +1,43 @@
+/*
+ * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <linux/io.h>
+#include <mach/init.h>
+#include <mach/sg-regs.h>
+
+void ph1_sld8_pin_init(void)
+{
+	/* Comment format:    PAD Name -> Function Name */
+
+#ifdef CONFIG_NAND_DENALI
+	sg_set_pinsel(15, 0, 8, 4);	/* XNFRE_GB -> XNFRE_GB */
+	sg_set_pinsel(16, 0, 8, 4);	/* XNFWE_GB -> XNFWE_GB */
+	sg_set_pinsel(17, 0, 8, 4);	/* XFALE_GB -> NFALE_GB */
+	sg_set_pinsel(18, 0, 8, 4);	/* XFCLE_GB -> NFCLE_GB */
+	sg_set_pinsel(19, 0, 8, 4);	/* XNFWP_GB -> XFNWP_GB */
+	sg_set_pinsel(20, 0, 8, 4);	/* XNFCE0_GB -> XNFCE0_GB */
+	sg_set_pinsel(21, 0, 8, 4);	/* NANDRYBY0_GB -> NANDRYBY0_GB */
+	sg_set_pinsel(22, 0, 8, 4);	/* XFNCE1_GB  -> XFNCE1_GB */
+	sg_set_pinsel(23, 0, 8, 4);	/* NANDRYBY1_GB  -> NANDRYBY1_GB */
+	sg_set_pinsel(24, 0, 8, 4);	/* NFD0_GB -> NFD0_GB */
+	sg_set_pinsel(25, 0, 8, 4);	/* NFD1_GB -> NFD1_GB */
+	sg_set_pinsel(26, 0, 8, 4);	/* NFD2_GB -> NFD2_GB */
+	sg_set_pinsel(27, 0, 8, 4);	/* NFD3_GB -> NFD3_GB */
+	sg_set_pinsel(28, 0, 8, 4);	/* NFD4_GB -> NFD4_GB */
+	sg_set_pinsel(29, 0, 8, 4);	/* NFD5_GB -> NFD5_GB */
+	sg_set_pinsel(30, 0, 8, 4);	/* NFD6_GB -> NFD6_GB */
+	sg_set_pinsel(31, 0, 8, 4);	/* NFD7_GB -> NFD7_GB */
+#endif
+
+#ifdef CONFIG_USB_EHCI_UNIPHIER
+	sg_set_pinsel(41, 0, 8, 4);	/* USB0VBUS -> USB0VBUS */
+	sg_set_pinsel(42, 0, 8, 4);	/* USB0OD   -> USB0OD */
+	sg_set_pinsel(43, 0, 8, 4);	/* USB1VBUS -> USB1VBUS */
+	sg_set_pinsel(44, 0, 8, 4);	/* USB1OD   -> USB1OD */
+	/* sg_set_pinsel(114, 1, 8, 4); */ /* TXD1 -> USB2VBUS (shared with UART) */
+	/* sg_set_pinsel(115, 1, 8, 4); */ /* RXD1 -> USB2OD */
+#endif
+}