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author | Tom Rini <trini@konsulko.com> | 2015-03-01 21:07:53 -0500 |
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committer | Tom Rini <trini@konsulko.com> | 2015-03-01 21:07:53 -0500 |
commit | 1da7ce4155d0839d9d56525379493bb0f80b5330 (patch) | |
tree | a29a93170e68b30d1a5b73a8210ddb92b5aaa3c7 /arch/arm/mach-uniphier/ph1-pro4/sbc_init.c | |
parent | fc834100950ab630f442aece500d8c9ccfa2b992 (diff) | |
parent | 105a9e705efaeeac63e795e2a184b0a18db0ac5a (diff) | |
download | u-boot-imx-1da7ce4155d0839d9d56525379493bb0f80b5330.zip u-boot-imx-1da7ce4155d0839d9d56525379493bb0f80b5330.tar.gz u-boot-imx-1da7ce4155d0839d9d56525379493bb0f80b5330.tar.bz2 |
Merge branch 'master' of git://git.denx.de/u-boot-uniphier
Diffstat (limited to 'arch/arm/mach-uniphier/ph1-pro4/sbc_init.c')
-rw-r--r-- | arch/arm/mach-uniphier/ph1-pro4/sbc_init.c | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/arch/arm/mach-uniphier/ph1-pro4/sbc_init.c b/arch/arm/mach-uniphier/ph1-pro4/sbc_init.c new file mode 100644 index 0000000..5e75454 --- /dev/null +++ b/arch/arm/mach-uniphier/ph1-pro4/sbc_init.c @@ -0,0 +1,43 @@ +/* + * Copyright (C) 2011-2015 Panasonic Corporation + * Author: Masahiro Yamada <yamada.m@jp.panasonic.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/io.h> +#include <mach/sbc-regs.h> +#include <mach/sg-regs.h> + +void sbc_init(void) +{ + /* + * Only CS1 is connected to support card. + * BKSZ[1:0] should be set to "01". + */ + writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL10); + writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL11); + writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL12); + writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL14); + + if (boot_is_swapped()) { + /* + * Boot Swap On: boot from external NOR/SRAM + * 0x02000000-0x03ffffff is a mirror of 0x00000000-0x01ffffff. + * + * 0x00000000-0x01efffff, 0x02000000-0x03efffff: memory bank + * 0x01f00000-0x01ffffff, 0x03f00000-0x03ffffff: peripherals + */ + writel(0x0000bc01, SBBASE0); + } else { + /* + * Boot Swap Off: boot from mask ROM + * 0x00000000-0x01ffffff: mask ROM + * 0x02000000-0x03efffff: memory bank (31MB) + * 0x03f00000-0x03ffffff: peripherals (1MB) + */ + writel(0x0000be01, SBBASE0); /* dummy */ + writel(0x0200be01, SBBASE1); + } +} |