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author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-04-21 14:43:18 +0900 |
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committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-04-24 09:54:08 +0900 |
commit | 9d0c2ceb35be7016977560a92fc67e3e704e5c9f (patch) | |
tree | 67f17e8bbc13a293b7d24f7789a3fb0692c1e284 /arch/arm/mach-uniphier/memconf/memconf-pxs2.c | |
parent | 881aa5a79a94a65500959428328f348a18d3d9fe (diff) | |
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ARM: uniphier: add PH1-LD20 SoC support
This is the first ARMv8 SoC from Socionext Inc.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/mach-uniphier/memconf/memconf-pxs2.c')
-rw-r--r-- | arch/arm/mach-uniphier/memconf/memconf-pxs2.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/mach-uniphier/memconf/memconf-pxs2.c b/arch/arm/mach-uniphier/memconf/memconf-pxs2.c index bf14d0d..e98eb48 100644 --- a/arch/arm/mach-uniphier/memconf/memconf-pxs2.c +++ b/arch/arm/mach-uniphier/memconf/memconf-pxs2.c @@ -49,6 +49,9 @@ int uniphier_pxs2_memconf_init(const struct uniphier_board_data *bd) case SZ_512M: tmp |= SG_MEMCONF_CH2_SZ_512M; break; + case SZ_1G: + tmp |= SG_MEMCONF_CH2_SZ_1G; + break; default: pr_err("error: unsupported DRAM Ch2 size\n"); return -EINVAL; |