summaryrefslogtreecommitdiff
path: root/arch/arm/mach-uniphier/memconf/memconf-ph1-sld3.c
diff options
context:
space:
mode:
authorTom Rini <trini@konsulko.com>2015-09-24 12:28:02 -0400
committerTom Rini <trini@konsulko.com>2015-09-24 12:28:02 -0400
commit7bb839d672ed3b28c7740429df4a307482868c5b (patch)
tree0713c473994463c67c13cd80c6206886509b98d6 /arch/arm/mach-uniphier/memconf/memconf-ph1-sld3.c
parentce50916ca1415da2f44931d93397d36ac0d208a2 (diff)
parenta4bb44b027705f8c05fc525180cabaa3769247bb (diff)
downloadu-boot-imx-7bb839d672ed3b28c7740429df4a307482868c5b.zip
u-boot-imx-7bb839d672ed3b28c7740429df4a307482868c5b.tar.gz
u-boot-imx-7bb839d672ed3b28c7740429df4a307482868c5b.tar.bz2
Merge branch 'master' of git://git.denx.de/u-boot-uniphier
Diffstat (limited to 'arch/arm/mach-uniphier/memconf/memconf-ph1-sld3.c')
-rw-r--r--arch/arm/mach-uniphier/memconf/memconf-ph1-sld3.c59
1 files changed, 59 insertions, 0 deletions
diff --git a/arch/arm/mach-uniphier/memconf/memconf-ph1-sld3.c b/arch/arm/mach-uniphier/memconf/memconf-ph1-sld3.c
new file mode 100644
index 0000000..e13f56d1
--- /dev/null
+++ b/arch/arm/mach-uniphier/memconf/memconf-ph1-sld3.c
@@ -0,0 +1,59 @@
+/*
+ * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/sizes.h>
+#include <mach/init.h>
+#include <mach/sg-regs.h>
+
+int ph1_sld3_memconf_init(const struct uniphier_board_data *bd)
+{
+ u32 tmp;
+ unsigned long size_per_word;
+
+ tmp = readl(SG_MEMCONF);
+
+ tmp &= ~(SG_MEMCONF_CH2_SZ_MASK | SG_MEMCONF_CH2_NUM_MASK);
+
+ switch (bd->dram_ch2_width) {
+ case 16:
+ tmp |= SG_MEMCONF_CH2_NUM_1;
+ size_per_word = bd->dram_ch2_size;
+ break;
+ case 32:
+ tmp |= SG_MEMCONF_CH2_NUM_2;
+ size_per_word = bd->dram_ch2_size >> 1;
+ break;
+ default:
+ pr_err("error: unsupported DRAM Ch2 width\n");
+ return -EINVAL;
+ }
+
+ /* Set DDR size */
+ switch (size_per_word) {
+ case SZ_64M:
+ tmp |= SG_MEMCONF_CH2_SZ_64M;
+ break;
+ case SZ_128M:
+ tmp |= SG_MEMCONF_CH2_SZ_128M;
+ break;
+ case SZ_256M:
+ tmp |= SG_MEMCONF_CH2_SZ_256M;
+ break;
+ case SZ_512M:
+ tmp |= SG_MEMCONF_CH2_SZ_512M;
+ break;
+ default:
+ pr_err("error: unsupported DRAM Ch2 size\n");
+ return -EINVAL;
+ }
+
+ writel(tmp, SG_MEMCONF);
+
+ return 0;
+}