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authorMasahiro Yamada <yamada.masahiro@socionext.com>2016-09-14 01:06:10 +0900
committerMasahiro Yamada <yamada.masahiro@socionext.com>2016-09-17 01:29:44 +0900
commitf6bbec3d5c12457e2ce207f662e65e7da70254ce (patch)
tree674e72034147ad69e92804357a1974b9ce3b899b /arch/arm/mach-uniphier/init.h
parentef70eb54aab8466b3989e83623b5ca4db78b7b2a (diff)
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ARM: uniphier: introduce flags to adjust DRAM timing for LD20/LD21
Unfortunately, this SoC needs per-board adjustment between clock and address/command lines. This flag will be passed to the DRAM init function and used for compensating the difference of DRAM timing parameters. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/mach-uniphier/init.h')
-rw-r--r--arch/arm/mach-uniphier/init.h11
1 files changed, 8 insertions, 3 deletions
diff --git a/arch/arm/mach-uniphier/init.h b/arch/arm/mach-uniphier/init.h
index a2fedbc..406d5d0 100644
--- a/arch/arm/mach-uniphier/init.h
+++ b/arch/arm/mach-uniphier/init.h
@@ -23,9 +23,14 @@ struct uniphier_board_data {
unsigned int dram_nr_ch;
struct uniphier_dram_ch dram_ch[UNIPHIER_MAX_NR_DRAM_CH];
unsigned int flags;
-#define UNIPHIER_BD_DDR3PLUS BIT(2)
-#define UNIPHIER_BD_PACKAGE_LD21 1
-#define UNIPHIER_BD_PACKAGE_TYPE(f) ((f) & 0x3)
+
+#define UNIPHIER_BD_DDR3PLUS BIT(2)
+
+#define UNIPHIER_BD_BOARD_GET_TYPE(f) ((f) & 0x3)
+#define UNIPHIER_BD_BOARD_LD20_REF 0 /* LD20 reference */
+#define UNIPHIER_BD_BOARD_LD20_GLOBAL 1 /* LD20 TV Set */
+#define UNIPHIER_BD_BOARD_LD21_REF 2 /* LD21 reference */
+#define UNIPHIER_BD_BOARD_LD21_GLOBAL 3 /* LD21 TV Set */
};
const struct uniphier_board_data *uniphier_get_board_param(void);