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| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2017-01-15 14:59:04 +0900 |
|---|---|---|
| committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2017-01-17 09:00:40 +0900 |
| commit | 8d6c99c66f94c78e65fdacca2fb2857101f8a5e7 (patch) | |
| tree | 5b299513f0b58bb4232181c5bab2a94f342526fb /arch/arm/mach-uniphier/cpu_info.c | |
| parent | 78c627cf1f808d5ae9240809a81b71903bdf4fe2 (diff) | |
| download | u-boot-imx-8d6c99c66f94c78e65fdacca2fb2857101f8a5e7.zip u-boot-imx-8d6c99c66f94c78e65fdacca2fb2857101f8a5e7.tar.gz u-boot-imx-8d6c99c66f94c78e65fdacca2fb2857101f8a5e7.tar.bz2 | |
ARM: uniphier: refactor MEMCONF init code
Currently, memconf-sld3.c and memconf-pxs2.c duplicate the code.
There are 3 patterns in terms of MEMCONF init:
- DRAM 2 channels: LD4, sLD8, Pro4, Pro5, LD11
- DRAM 3 channels: sLD3
- DRAM 3 channels (Ch2 is disable by MEMCONF[21]): Pxs2, LD20
All of them can be moved into a single file by a little more
refactoring.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/mach-uniphier/cpu_info.c')
0 files changed, 0 insertions, 0 deletions