Merge remote-tracking branch 'u-boot/master'

6 files changed, 384 insertions, 0 deletions

diff --git a/arch/arm/mach-uniphier/boot-mode/Makefile b/arch/arm/mach-uniphier/boot-mode/Makefile
new file mode 100644
index 0000000..30c8874
--- /dev/null
+++ b/arch/arm/mach-uniphier/boot-mode/Makefile
@@ -0,0 +1,9 @@
+obj-y					+= boot-mode.o
+
+obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3)	+= boot-mode-ph1-sld3.o
+obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4)	+= boot-mode-ph1-ld4.o
+obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4)	+= boot-mode-ph1-ld4.o
+obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8)	+= boot-mode-ph1-ld4.o
+obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO5)	+= boot-mode-ph1-pro5.o
+obj-$(CONFIG_ARCH_UNIPHIER_PROXSTREAM2)	+= boot-mode-proxstream2.o
+obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD6B)	+= boot-mode-proxstream2.o
diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode-ph1-ld4.c b/arch/arm/mach-uniphier/boot-mode/boot-mode-ph1-ld4.c
new file mode 100644
index 0000000..f974d9f
--- /dev/null
+++ b/arch/arm/mach-uniphier/boot-mode/boot-mode-ph1-ld4.c
@@ -0,0 +1,74 @@
+/*
+ * Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <spl.h>
+#include <linux/io.h>
+#include <mach/boot-device.h>
+#include <mach/sg-regs.h>
+#include <mach/sbc-regs.h>
+
+struct boot_device_info boot_device_table[] = {
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC  8, EraseSize 128KB, Addr 4)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC  8, EraseSize 128KB, Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC  8, EraseSize 256KB, Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 256KB, Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC  8, EraseSize 512KB, Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 24, EraseSize   1MB, Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 4, ECC 24, EraseSize   1MB, Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC  8, EraseSize 128KB, Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC  8, EraseSize 256KB, Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 256KB, Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC  8, EraseSize 512KB, Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 512KB, Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 24, EraseSize 512KB, Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC  8, ONFI,            Addr 4)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC  8, ONFI,            Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI,            Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 24, ONFI,            Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 4, ECC 24, ONFI,            Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC  8, ONFI,            Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI,            Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 24, ONFI,            Addr 5)"},
+	{BOOT_DEVICE_MMC1, "eMMC Boot (3.3V)"},
+	{BOOT_DEVICE_MMC1, "eMMC Boot (1.8V)"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+};
+
+static int get_boot_mode_sel(void)
+{
+	return (readl(SG_PINMON0) >> 1) & 0x1f;
+}
+
+u32 ph1_ld4_boot_device(void)
+{
+	int boot_mode;
+
+	boot_mode = get_boot_mode_sel();
+
+	return boot_device_table[boot_mode].type;
+}
+
+void ph1_ld4_boot_mode_show(void)
+{
+	int mode_sel, i;
+
+	mode_sel = get_boot_mode_sel();
+
+	puts("Boot Mode Pin:\n");
+
+	for (i = 0; i < ARRAY_SIZE(boot_device_table); i++)
+		printf(" %c %02x %s\n", i == mode_sel ? '*' : ' ', i,
+		       boot_device_table[i].info);
+}
diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode-ph1-pro5.c b/arch/arm/mach-uniphier/boot-mode/boot-mode-ph1-pro5.c
new file mode 100644
index 0000000..c68cb59
--- /dev/null
+++ b/arch/arm/mach-uniphier/boot-mode/boot-mode-ph1-pro5.c
@@ -0,0 +1,75 @@
+/*
+ * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <spl.h>
+#include <linux/io.h>
+#include <mach/boot-device.h>
+#include <mach/sbc-regs.h>
+#include <mach/sg-regs.h>
+
+static struct boot_device_info boot_device_table[] = {
+	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC  8, EraseSize 128KB, Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC  8, EraseSize 256KB, Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 256KB, Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC  8, EraseSize 512KB, Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 512KB, Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC  8, EraseSize 128KB, Addr 4)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128MB, Addr 4)"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC  8, EraseSize 512MB, Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC  8, EraseSize 128KB, Addr 4)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 4)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC  8, ONFI,            Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI,            Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC  8, ONFI,            Addr 4)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI,            Addr 4)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC  8, ONFI,            Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI,            Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC  8, ONFI,            Addr 4)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI,            Addr 4)"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_MMC1, "eMMC Boot (1.8V)"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC  8, EraseSize 128MB, Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC  8, EraseSize 256KB, Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 256KB, Addr 5)"},
+	{ /* sentinel */ }
+};
+
+static int get_boot_mode_sel(void)
+{
+	return (readl(SG_PINMON0) >> 1) & 0x1f;
+}
+
+u32 ph1_pro5_boot_device(void)
+{
+	int boot_mode;
+
+	boot_mode = get_boot_mode_sel();
+
+	return boot_device_table[boot_mode].type;
+}
+
+void ph1_pro5_boot_mode_show(void)
+{
+	int mode_sel, i;
+
+	mode_sel = get_boot_mode_sel();
+
+	puts("Boot Mode Pin:\n");
+
+	for (i = 0; i < ARRAY_SIZE(boot_device_table); i++)
+		printf(" %c %02x %s\n", i == mode_sel ? '*' : ' ', i,
+		       boot_device_table[i].info);
+}
diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode-ph1-sld3.c b/arch/arm/mach-uniphier/boot-mode/boot-mode-ph1-sld3.c
new file mode 100644
index 0000000..c943e12
--- /dev/null
+++ b/arch/arm/mach-uniphier/boot-mode/boot-mode-ph1-sld3.c
@@ -0,0 +1,106 @@
+/*
+ * Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <spl.h>
+#include <linux/io.h>
+#include <mach/boot-device.h>
+#include <mach/sg-regs.h>
+#include <mach/sbc-regs.h>
+
+static struct boot_device_info boot_device_table[] = {
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NONE, "External Master"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_MMC1, "eMMC (3.3V, Boot Oparation)"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_MMC1, "eMMC (1.8V, Boot Oparation)"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_MMC1, "eMMC (3.3V, Normal)"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_MMC1, "eMMC (1.8V, Normal)"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC  8, EraseSize 128KB, Addr 5)"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC  8, EraseSize 256KB, Addr 5)"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC  8, EraseSize 512KB, Addr 5)"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 5)"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 256KB, Addr 5)"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 512KB, Addr 5)"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 4, ECC 24, EraseSize   1MB, Addr 5)"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC  8, EraseSize 128KB, Addr 5)"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC  8, EraseSize 256KB, Addr 5)"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC  8, EraseSize 512KB, Addr 5)"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 256KB, Addr 5)"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 24, EraseSize   1MB, Addr 5)"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC  8, ONFI,            Addr 5)"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI,            Addr 5)"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 4, ECC 24, ONFI,            Addr 5)"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC  8, ONFI,            Addr 5)"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI,            Addr 5)"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 24, ONFI,            Addr 5)"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+};
+
+static int get_boot_mode_sel(void)
+{
+	return readl(SG_PINMON0) & 0x3f;
+}
+
+u32 ph1_sld3_boot_device(void)
+{
+	int boot_mode;
+
+	boot_mode = get_boot_mode_sel();
+
+	return boot_device_table[boot_mode].type;
+}
+
+void ph1_sld3_boot_mode_show(void)
+{
+	int mode_sel, i;
+
+	mode_sel = get_boot_mode_sel();
+
+	puts("Boot Mode Pin:\n");
+
+	for (i = 0; i < ARRAY_SIZE(boot_device_table); i++)
+		printf(" %c %02x %s\n", i == mode_sel ? '*' : ' ', i,
+		       boot_device_table[i].info);
+}
diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode-proxstream2.c b/arch/arm/mach-uniphier/boot-mode/boot-mode-proxstream2.c
new file mode 100644
index 0000000..10a47c6
--- /dev/null
+++ b/arch/arm/mach-uniphier/boot-mode/boot-mode-proxstream2.c
@@ -0,0 +1,75 @@
+/*
+ * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <spl.h>
+#include <linux/io.h>
+#include <mach/boot-device.h>
+#include <mach/init.h>
+#include <mach/sbc-regs.h>
+#include <mach/sg-regs.h>
+
+static struct boot_device_info boot_device_table[] = {
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC  8, EraseSize 128KB, Addr 4)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC  8, EraseSize 128KB, Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC  8, EraseSize 256KB, Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 256KB, Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC  8, EraseSize 512KB, Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 4)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC  8, EraseSize 128KB, Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC  8, EraseSize 256KB, Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 256KB, Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC  8, EraseSize 512KB, Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 512KB, Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC  8, EraseSize 128KB, Addr 4)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 4)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC  8, ONFI,            Addr 4)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC  8, ONFI,            Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI,            Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI,            Addr 4)"},
+	{BOOT_DEVICE_MMC1, "eMMC Boot (1.8V)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC  8, ONFI,            Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI,            Addr 5)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC  8, ONFI,            Addr 4)"},
+	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI,            Addr 4)"},
+	{BOOT_DEVICE_SPI,  "SPI 3Byte CS0"},
+	{BOOT_DEVICE_SPI,  "SPI 4Byte CS0"},
+	{BOOT_DEVICE_SPI,  "SPI 3Byte CS1"},
+	{BOOT_DEVICE_SPI,  "SPI 4Byte CS1"},
+	{BOOT_DEVICE_SPI,  "SPI 4Byte CS0"},
+	{BOOT_DEVICE_SPI,  "SPI 3Byte CS0"},
+	{BOOT_DEVICE_NONE, "Reserved"},
+};
+
+int get_boot_mode_sel(void)
+{
+	return (readl(SG_PINMON0) >> 1) & 0x1f;
+}
+
+u32 proxstream2_boot_device(void)
+{
+	int boot_mode;
+
+	boot_mode = get_boot_mode_sel();
+
+	return boot_device_table[boot_mode].type;
+}
+
+void proxstream2_boot_mode_show(void)
+{
+	int mode_sel, i;
+
+	mode_sel = get_boot_mode_sel();
+
+	puts("Boot Mode Pin:\n");
+
+	for (i = 0; i < ARRAY_SIZE(boot_device_table); i++)
+		printf(" %c %02x %s\n", i == mode_sel ? '*' : ' ', i,
+		       boot_device_table[i].info);
+}
diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode.c b/arch/arm/mach-uniphier/boot-mode/boot-mode.c
new file mode 100644
index 0000000..c6cafa7
--- /dev/null
+++ b/arch/arm/mach-uniphier/boot-mode/boot-mode.c
@@ -0,0 +1,45 @@
+/*
+ * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <spl.h>
+#include <linux/io.h>
+#include <mach/boot-device.h>
+#include <mach/sbc-regs.h>
+#include <mach/soc_info.h>
+
+u32 spl_boot_device(void)
+{
+	if (boot_is_swapped())
+		return BOOT_DEVICE_NOR;
+
+	switch (uniphier_get_soc_type()) {
+#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3)
+	case SOC_UNIPHIER_PH1_SLD3:
+		return ph1_sld3_boot_device();
+#endif
+#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) || \
+	defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4) || \
+	defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8)
+	case SOC_UNIPHIER_PH1_LD4:
+	case SOC_UNIPHIER_PH1_PRO4:
+	case SOC_UNIPHIER_PH1_SLD8:
+		return ph1_ld4_boot_device();
+#endif
+#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO5)
+	case SOC_UNIPHIER_PH1_PRO5:
+		return ph1_pro5_boot_device();
+#endif
+#if defined(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) || \
+	defined(CONFIG_ARCH_UNIPHIER_PH1_LD6B)
+	case SOC_UNIPHIER_PROXSTREAM2:
+	case SOC_UNIPHIER_PH1_LD6B:
+		return proxstream2_boot_device();
+#endif
+	default:
+		return BOOT_DEVICE_NONE;
+	}
+}