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authorMasahiro Yamada <yamada.masahiro@socionext.com>2016-08-10 16:08:47 +0900
committerMasahiro Yamada <yamada.masahiro@socionext.com>2016-08-11 17:49:45 +0900
commit5941638027b62d0d8c1a5881b38d53a13ebcc5e1 (patch)
treed08f1f52daac68c8f202c1cff25ee622b32e5773 /arch/arm/mach-uniphier/arm32/cache-uniphier.c
parent8fca073271706f3d856c6554c2b5400ac9c83c10 (diff)
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ARM: uniphier: add uniphier_cache_inv_way() to support way invalidation
This invalidates entries in specified ways of the outer cache. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/mach-uniphier/arm32/cache-uniphier.c')
-rw-r--r--arch/arm/mach-uniphier/arm32/cache-uniphier.c10
1 files changed, 9 insertions, 1 deletions
diff --git a/arch/arm/mach-uniphier/arm32/cache-uniphier.c b/arch/arm/mach-uniphier/arm32/cache-uniphier.c
index da9488e..f1a36ed 100644
--- a/arch/arm/mach-uniphier/arm32/cache-uniphier.c
+++ b/arch/arm/mach-uniphier/arm32/cache-uniphier.c
@@ -72,7 +72,8 @@
#define UNIPHIER_SSCOQAD_IS_NEEDED(op) \
((op & UNIPHIER_SSCOQM_S_MASK) == UNIPHIER_SSCOQM_S_RANGE)
#define UNIPHIER_SSCOQWM_IS_NEEDED(op) \
- ((op & UNIPHIER_SSCOQM_TID_MASK) == UNIPHIER_SSCOQM_TID_WAY)
+ (((op & UNIPHIER_SSCOQM_S_MASK) == UNIPHIER_SSCOQM_S_WAY) || \
+ ((op & UNIPHIER_SSCOQM_TID_MASK) == UNIPHIER_SSCOQM_TID_WAY))
/* uniphier_cache_sync - perform a sync point for a particular cache level */
static void uniphier_cache_sync(void)
@@ -184,6 +185,13 @@ void uniphier_cache_touch_zero_range(u32 start, u32 end, u32 ways)
UNIPHIER_SSCOQM_CM_TOUCH_ZERO);
}
+void uniphier_cache_inv_way(u32 ways)
+{
+ uniphier_cache_maint_common(0, 0, ways,
+ UNIPHIER_SSCOQM_S_WAY |
+ UNIPHIER_SSCOQM_CM_INV);
+}
+
static void uniphier_cache_endisable(int enable)
{
u32 tmp;