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authorStephen Warren <swarren@nvidia.com>2015-02-24 14:08:27 -0700
committerTom Warren <twarren@nvidia.com>2015-03-04 10:09:00 -0700
commitb2cd3d810387095e525522de6cae2716f4c20870 (patch)
tree83a0c0ba0d23cb01a7bfa72bb9c9b6b8cb3dc94b /arch/arm/mach-tegra/xusb-padctl.c
parentbc13472867beaf350b569a98c49a102476537e4f (diff)
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ARM: tegra: pinmux: partially handle varying register layouts
Tegra210 moves some bits around in the pinmux registers. Update the code to handle this. This doesn't attempt to address the issues with the group-to-group varying drive group register layout mentioned earlier. This patch handles the SoC-to-SoC differences in the mux register layout. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
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