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authorTom Rini <trini@konsulko.com>2016-09-27 12:47:25 -0400
committerTom Rini <trini@konsulko.com>2016-09-27 12:47:25 -0400
commit40e1236afeeacdadfa3865f70fc7e3b8016acbe2 (patch)
treea915b83d54beceb8a5c4fa424c0bcb6df56238d8 /arch/arm/mach-tegra/tegra30
parent6d5565608f385b89f528ecf5680410cdc6cf63e9 (diff)
parent8e5d804f890b32959cc9d9f9349ccd2ff4a744a0 (diff)
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Merge branch 'master' of git://git.denx.de/u-boot-tegra
Diffstat (limited to 'arch/arm/mach-tegra/tegra30')
-rw-r--r--arch/arm/mach-tegra/tegra30/clock.c87
1 files changed, 71 insertions, 16 deletions
diff --git a/arch/arm/mach-tegra/tegra30/clock.c b/arch/arm/mach-tegra/tegra30/clock.c
index 1f104f2..4fd8b8a 100644
--- a/arch/arm/mach-tegra/tegra30/clock.c
+++ b/arch/arm/mach-tegra/tegra30/clock.c
@@ -476,6 +476,51 @@ u32 *get_periph_source_reg(enum periph_id periph_id)
return &clkrst->crc_clk_src[internal_id];
}
+int get_periph_clock_info(enum periph_id periph_id, int *mux_bits,
+ int *divider_bits, int *type)
+{
+ enum periphc_internal_id internal_id;
+
+ if (!clock_periph_id_isvalid(periph_id))
+ return -1;
+
+ internal_id = periph_id_to_internal_id[periph_id];
+ if (!periphc_internal_id_isvalid(internal_id))
+ return -1;
+
+ *type = clock_periph_type[internal_id];
+ if (!clock_type_id_isvalid(*type))
+ return -1;
+
+ *mux_bits = clock_source[*type][CLOCK_MAX_MUX];
+
+ if (*type == CLOCK_TYPE_PCMT16)
+ *divider_bits = 16;
+ else
+ *divider_bits = 8;
+
+ return 0;
+}
+
+enum clock_id get_periph_clock_id(enum periph_id periph_id, int source)
+{
+ enum periphc_internal_id internal_id;
+ int type;
+
+ if (!clock_periph_id_isvalid(periph_id))
+ return CLOCK_ID_NONE;
+
+ internal_id = periph_id_to_internal_id[periph_id];
+ if (!periphc_internal_id_isvalid(internal_id))
+ return CLOCK_ID_NONE;
+
+ type = clock_periph_type[internal_id];
+ if (!clock_type_id_isvalid(type))
+ return CLOCK_ID_NONE;
+
+ return clock_source[type][source];
+}
+
/**
* Given a peripheral ID and the required source clock, this returns which
* value should be programmed into the source mux for that peripheral.
@@ -492,23 +537,10 @@ int get_periph_clock_source(enum periph_id periph_id,
enum clock_id parent, int *mux_bits, int *divider_bits)
{
enum clock_type_id type;
- enum periphc_internal_id internal_id;
- int mux;
+ int mux, err;
- assert(clock_periph_id_isvalid(periph_id));
-
- internal_id = periph_id_to_internal_id[periph_id];
- assert(periphc_internal_id_isvalid(internal_id));
-
- type = clock_periph_type[internal_id];
- assert(clock_type_id_isvalid(type));
-
- *mux_bits = clock_source[type][CLOCK_MAX_MUX];
-
- if (type == CLOCK_TYPE_PCMT16)
- *divider_bits = 16;
- else
- *divider_bits = 8;
+ err = get_periph_clock_info(periph_id, mux_bits, divider_bits, &type);
+ assert(!err);
for (mux = 0; mux < CLOCK_MAX_MUX; mux++)
if (clock_source[type][mux] == parent)
@@ -763,3 +795,26 @@ int tegra_plle_enable(void)
return 0;
}
+
+struct periph_clk_init periph_clk_init_table[] = {
+ { PERIPH_ID_SBC1, CLOCK_ID_PERIPH },
+ { PERIPH_ID_SBC2, CLOCK_ID_PERIPH },
+ { PERIPH_ID_SBC3, CLOCK_ID_PERIPH },
+ { PERIPH_ID_SBC4, CLOCK_ID_PERIPH },
+ { PERIPH_ID_SBC5, CLOCK_ID_PERIPH },
+ { PERIPH_ID_SBC6, CLOCK_ID_PERIPH },
+ { PERIPH_ID_HOST1X, CLOCK_ID_PERIPH },
+ { PERIPH_ID_DISP1, CLOCK_ID_CGENERAL },
+ { PERIPH_ID_NDFLASH, CLOCK_ID_PERIPH },
+ { PERIPH_ID_SDMMC1, CLOCK_ID_PERIPH },
+ { PERIPH_ID_SDMMC2, CLOCK_ID_PERIPH },
+ { PERIPH_ID_SDMMC3, CLOCK_ID_PERIPH },
+ { PERIPH_ID_SDMMC4, CLOCK_ID_PERIPH },
+ { PERIPH_ID_PWM, CLOCK_ID_SFROM32KHZ },
+ { PERIPH_ID_DVC_I2C, CLOCK_ID_PERIPH },
+ { PERIPH_ID_I2C1, CLOCK_ID_PERIPH },
+ { PERIPH_ID_I2C2, CLOCK_ID_PERIPH },
+ { PERIPH_ID_I2C3, CLOCK_ID_PERIPH },
+ { PERIPH_ID_I2C4, CLOCK_ID_PERIPH },
+ { -1, },
+};