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author | Tom Rini <trini@konsulko.com> | 2016-11-08 10:36:57 -0500 |
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committer | Tom Rini <trini@konsulko.com> | 2016-11-08 10:36:57 -0500 |
commit | 38cacdab3b5a6d8efd16a4b2620f7ab72144a624 (patch) | |
tree | 9512b7854ae573df2fa63591ff6d1c80ddc44d2b /arch/arm/mach-tegra/tegra186/cache.S | |
parent | d8c4eb60f8d1af74116eaee4f53adc937e618d6f (diff) | |
parent | a8d0526133e542ea93a741fd18833e571e817775 (diff) | |
download | u-boot-imx-38cacdab3b5a6d8efd16a4b2620f7ab72144a624.zip u-boot-imx-38cacdab3b5a6d8efd16a4b2620f7ab72144a624.tar.gz u-boot-imx-38cacdab3b5a6d8efd16a4b2620f7ab72144a624.tar.bz2 |
Merge branch 'master' of git://git.denx.de/u-boot-tegra
Diffstat (limited to 'arch/arm/mach-tegra/tegra186/cache.S')
-rw-r--r-- | arch/arm/mach-tegra/tegra186/cache.S | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/tegra186/cache.S b/arch/arm/mach-tegra/tegra186/cache.S new file mode 100644 index 0000000..3061dc2 --- /dev/null +++ b/arch/arm/mach-tegra/tegra186/cache.S @@ -0,0 +1,43 @@ +/* + * Copyright (c) 2016, NVIDIA CORPORATION. + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include <config.h> +#include <linux/linkage.h> + +#define SMC_SIP_INVOKE_MCE 0x82FFFF00 +#define MCE_SMC_ROC_FLUSH_CACHE (SMC_SIP_INVOKE_MCE | 11) +#define MCE_SMC_ROC_FLUSH_CACHE_ONLY (SMC_SIP_INVOKE_MCE | 14) +#define MCE_SMC_ROC_CLEAN_CACHE_ONLY (SMC_SIP_INVOKE_MCE | 15) + +ENTRY(__asm_tegra_cache_smc) + mov x1, #0 + mov x2, #0 + mov x3, #0 + mov x4, #0 + mov x5, #0 + mov x6, #0 + smc #0 + mov x0, #0 + ret +ENDPROC(__asm_invalidate_l3_dcache) + +ENTRY(__asm_invalidate_l3_dcache) + mov x0, #(MCE_SMC_ROC_FLUSH_CACHE_ONLY & 0xffff) + movk x0, #(MCE_SMC_ROC_FLUSH_CACHE_ONLY >> 16), lsl #16 + b __asm_tegra_cache_smc +ENDPROC(__asm_invalidate_l3_dcache) + +ENTRY(__asm_flush_l3_dcache) + mov x0, #(MCE_SMC_ROC_CLEAN_CACHE_ONLY & 0xffff) + movk x0, #(MCE_SMC_ROC_CLEAN_CACHE_ONLY >> 16), lsl #16 + b __asm_tegra_cache_smc +ENDPROC(__asm_flush_l3_dcache) + +ENTRY(__asm_invalidate_l3_icache) + mov x0, #(MCE_SMC_ROC_FLUSH_CACHE & 0xffff) + movk x0, #(MCE_SMC_ROC_FLUSH_CACHE >> 16), lsl #16 + b __asm_tegra_cache_smc +ENDPROC(__asm_invalidate_l3_icache) |