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| author | Jan Kiszka <jan.kiszka@siemens.com> | 2015-04-21 07:18:37 +0200 |
|---|---|---|
| committer | Tom Warren <twarren@nvidia.com> | 2015-05-13 09:24:16 -0700 |
| commit | a0d0a594ccf54f4f430d271cab9ddb95958a9495 (patch) | |
| tree | f876541428615359323694e10db098d12eaabf2d /arch/arm/mach-tegra/psci.S | |
| parent | 73169874a2867cb8ee5ec79eb9f2b176d3af34b2 (diff) | |
| download | u-boot-imx-a0d0a594ccf54f4f430d271cab9ddb95958a9495.zip u-boot-imx-a0d0a594ccf54f4f430d271cab9ddb95958a9495.tar.gz u-boot-imx-a0d0a594ccf54f4f430d271cab9ddb95958a9495.tar.bz2 | |
tegra: Set CNTFRQ for secondary CPUs
We only set CNTFRQ in arch_timer_init for the boot CPU. But this has to
happen for all cores.
Fixing this resolves problems of KVM with emulating the generic
timer/counter.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Tested-by: Ian Campbell <ijc@hellion.org.uk>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/psci.S')
| -rw-r--r-- | arch/arm/mach-tegra/psci.S | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/psci.S b/arch/arm/mach-tegra/psci.S index e4733e6..b836da1 100644 --- a/arch/arm/mach-tegra/psci.S +++ b/arch/arm/mach-tegra/psci.S @@ -51,12 +51,25 @@ ENTRY(psci_arch_init) str r5, [r4] bl psci_get_cpu_id @ CPU ID => r0 + + adr r5, _sys_clock_freq + cmp r0, #0 + + mrceq p15, 0, r7, c14, c0, 0 @ read CNTFRQ from CPU0 + streq r7, [r5] + + ldrne r7, [r5] + mcrne p15, 0, r7, c14, c0, 0 @ write CNTFRQ to CPU1..3 + bl psci_get_cpu_stack_top @ stack top => r0 mov sp, r0 bx r6 ENDPROC(psci_arch_init) +_sys_clock_freq: + .word 0 + ENTRY(psci_cpu_off) bl psci_cpu_off_common |