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authorSimon Glass <sjg@chromium.org>2015-08-30 16:55:38 -0600
committerSimon Glass <sjg@chromium.org>2015-09-02 21:28:24 -0600
commit2444dae587815e5ba14cb27c32f57bc3b3bbed1d (patch)
tree2c4024c27b69054296477d7743dfc54980c8b6f3 /arch/arm/mach-rockchip/Kconfig
parenta8cb4fb56ac53cab89657b7e8295ec001bbf78bf (diff)
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rockchip: Add core SoC start-up code
Add code for starting up U-Boot SPL and U-Boot proper. This is generic and makes use of devices provided by the board- or SoC-specific code. Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/arm/mach-rockchip/Kconfig')
-rw-r--r--arch/arm/mach-rockchip/Kconfig41
1 files changed, 41 insertions, 0 deletions
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
new file mode 100644
index 0000000..ab50f4e
--- /dev/null
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -0,0 +1,41 @@
+if ARCH_ROCKCHIP
+
+config ROCKCHIP_RK3288
+ bool "Support Rockchip RK3288"
+ help
+ The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
+ including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
+ video interfaces supporting HDMI and eDP, several DDR3 options
+ and video codec support. Peripherals include Gigabit Ethernet,
+ USB2 host and OTG, SDIO, I2S, UART,s, SPI, I2C and PWMs.
+
+config SYS_MALLOC_F
+ default y
+
+config SYS_MALLOC_F_LEN
+ default 0x800
+
+config SPL_DM
+ default y
+
+config DM_SERIAL
+ default y
+
+config DM_SPI
+ default y
+
+config DM_SPI_FLASH
+ default y
+
+config DM_I2C
+ default y
+
+config DM_GPIO
+ default y
+
+config ROCKCHIP_SERIAL
+ default y
+
+source "arch/arm/mach-rockchip/rk3288/Kconfig"
+
+endif