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author | Stefan Roese <sr@denx.de> | 2016-05-25 08:13:45 +0200 |
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committer | Stefan Roese <sr@denx.de> | 2016-09-27 17:29:54 +0200 |
commit | 21b29fc64e9da24485d044538004d2056bda15e4 (patch) | |
tree | ea1f590311ed709270d14f425535a820838e10c0 /arch/arm/mach-mvebu/sata.c | |
parent | 1335483a69c0a75445e7daa6771bc3d98af4d986 (diff) | |
download | u-boot-imx-21b29fc64e9da24485d044538004d2056bda15e4.zip u-boot-imx-21b29fc64e9da24485d044538004d2056bda15e4.tar.gz u-boot-imx-21b29fc64e9da24485d044538004d2056bda15e4.tar.bz2 |
arm64: mvebu: Add basic support for the Marvell Armada 7K/8K SoC
Compared to the Armada 3700, the Armada 7K and 8K are much more on the
high-end side: they use a dual Cortex-A72 or a quad Cortex-A72, as
opposed to the Cortex-A53 for the Armada 3700.
The Armada 7K and 8K also use a fairly unique architecture, internally
they are composed of several components:
- One AP (Application Processor), which contains the processor itself
and a few core hardware blocks. The AP used in the Armada 7K and 8K
is called AP806, and is available in two configurations:
dual Cortex-A72 and quad Cortex-A72.
- One or two CP (Communication Processor), which contain most of the I/O
interfaces (SATA, PCIe, Ethernet, etc.). The 7K family chips have one
CP, while the 8K family chips integrate two CPs, providing two times
the number of I/O interfaces available in the CP.
The CP used in the 7K and 8K is called CP110.
All in all, this gives the following combinations:
- Armada 7020, which is a dual Cortex-A72 with one CP
- Armada 7040, which is a quad Cortex-A72 with one CP
- Armada 8020, which is a dual Cortex-A72 with two CPs
- Armada 8040, which is a quad Cortex-A72 with two CPs
This patch adds basic support for this ARMv8 based SoC into U-Boot.
Future patches will integrate other device drivers and board support,
starting with the Marvell DB-88F7040 development board.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
Diffstat (limited to 'arch/arm/mach-mvebu/sata.c')
-rw-r--r-- | arch/arm/mach-mvebu/sata.c | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/arch/arm/mach-mvebu/sata.c b/arch/arm/mach-mvebu/sata.c new file mode 100644 index 0000000..140a295 --- /dev/null +++ b/arch/arm/mach-mvebu/sata.c @@ -0,0 +1,54 @@ +/* + * Copyright (C) 2016 Stefan Roese <sr@denx.de> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <ahci.h> +#include <dm.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* + * Dummy implementation that can be overwritten by a board + * specific function + */ +__weak int board_ahci_enable(void) +{ + return 0; +} + +#ifdef CONFIG_ARMADA_8K +/* CP110 has different AHCI port addresses */ +void __iomem *ahci_port_base(void __iomem *base, u32 port) +{ + return base + 0x10000 + (port * 0x10000); +} +#endif + +static int mvebu_ahci_probe(struct udevice *dev) +{ + /* + * Board specific SATA / AHCI enable code, e.g. enable the + * AHCI power or deassert reset + */ + board_ahci_enable(); + + ahci_init(dev_get_addr_ptr(dev)); + + return 0; +} + +static const struct udevice_id mvebu_ahci_ids[] = { + { .compatible = "marvell,armada-3700-ahci" }, + { .compatible = "marvell,armada-8k-ahci" }, + { } +}; + +U_BOOT_DRIVER(ahci_mvebu_drv) = { + .name = "ahci_mvebu", + .id = UCLASS_AHCI, + .of_match = mvebu_ahci_ids, + .probe = mvebu_ahci_probe, +}; |