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| author | Stefan Roese <sr@denx.de> | 2016-01-20 08:13:28 +0100 |
|---|---|---|
| committer | Anatolij Gustschin <agust@denx.de> | 2016-01-23 22:58:07 +0100 |
| commit | 913d1be20801c3fed3dd1e832d3bf5bdde159f32 (patch) | |
| tree | d1e672a3cf5b0c3d62409024cb3f61a5db3db59a /arch/arm/mach-mvebu/include | |
| parent | 12f229ea8f6c8e20f8fd07906eafc853c4c354a9 (diff) | |
| download | u-boot-imx-913d1be20801c3fed3dd1e832d3bf5bdde159f32.zip u-boot-imx-913d1be20801c3fed3dd1e832d3bf5bdde159f32.tar.gz u-boot-imx-913d1be20801c3fed3dd1e832d3bf5bdde159f32.tar.bz2 | |
video: Add support for Armada XP LCD controller
This patch adds basic support for the LCD controller of the Marvell
Armada XP SoC.
An AXP based custom board port will be added later, to use this
driver to display a splash screen via the bmp command later.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
[agust: rebased]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Diffstat (limited to 'arch/arm/mach-mvebu/include')
| -rw-r--r-- | arch/arm/mach-mvebu/include/mach/cpu.h | 13 | ||||
| -rw-r--r-- | arch/arm/mach-mvebu/include/mach/soc.h | 1 |
2 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/mach-mvebu/include/mach/cpu.h b/arch/arm/mach-mvebu/include/mach/cpu.h index 47f45c1..017d55f 100644 --- a/arch/arm/mach-mvebu/include/mach/cpu.h +++ b/arch/arm/mach-mvebu/include/mach/cpu.h @@ -145,5 +145,18 @@ int serdes_phy_config(void); * drivers/ddr/marvell */ int ddr3_init(void); + +struct mvebu_lcd_info { + u32 fb_base; + int x_res; + int y_res; + int x_fp; /* frontporch */ + int y_fp; + int x_bp; /* backporch */ + int y_bp; +}; + +int mvebu_lcd_register_init(struct mvebu_lcd_info *lcd_info); + #endif /* __ASSEMBLY__ */ #endif /* _MVEBU_CPU_H */ diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h index cb216bc..b317940 100644 --- a/arch/arm/mach-mvebu/include/mach/soc.h +++ b/arch/arm/mach-mvebu/include/mach/soc.h @@ -67,6 +67,7 @@ #define MVEBU_SATA0_BASE (MVEBU_REGISTER(0xa8000)) #define MVEBU_NAND_BASE (MVEBU_REGISTER(0xd0000)) #define MVEBU_SDIO_BASE (MVEBU_REGISTER(0xd8000)) +#define MVEBU_LCD_BASE (MVEBU_REGISTER(0xe0000)) #define SOC_COHERENCY_FABRIC_CTRL_REG (MVEBU_REGISTER(0x20200)) #define MBUS_ERR_PROP_EN (1 << 8) |