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author | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2015-07-07 11:38:44 +0200 |
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committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2015-07-07 11:38:44 +0200 |
commit | 6f43ba70d15e15a08c25b3d956c70addb6740737 (patch) | |
tree | e5ddc8498043c0c47559737ea60e4d7fc866e20a /arch/arm/mach-mvebu/cpu.c | |
parent | 003b09dad492ebc385b28067b8028a0c0ff9323f (diff) | |
parent | 9c6b05cb724e18d1db3f9e1a75b2272572f06fbd (diff) | |
download | u-boot-imx-6f43ba70d15e15a08c25b3d956c70addb6740737.zip u-boot-imx-6f43ba70d15e15a08c25b3d956c70addb6740737.tar.gz u-boot-imx-6f43ba70d15e15a08c25b3d956c70addb6740737.tar.bz2 |
Merge branch 'u-boot/master' into 'u-boot-arm/master'
Diffstat (limited to 'arch/arm/mach-mvebu/cpu.c')
-rw-r--r-- | arch/arm/mach-mvebu/cpu.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c index 04681fc..0121db8 100644 --- a/arch/arm/mach-mvebu/cpu.c +++ b/arch/arm/mach-mvebu/cpu.c @@ -7,6 +7,7 @@ #include <common.h> #include <netdev.h> #include <asm/io.h> +#include <asm/pl310.h> #include <asm/arch/cpu.h> #include <asm/arch/soc.h> @@ -160,10 +161,17 @@ static void update_sdram_window_sizes(void) } #ifdef CONFIG_ARCH_CPU_INIT +static void set_cbar(u32 addr) +{ + asm("mcr p15, 4, %0, c15, c0" : : "r" (addr)); +} + + int arch_cpu_init(void) { /* Linux expects the internal registers to be at 0xf1000000 */ writel(SOC_REGS_PHY_BASE, INTREG_BASE_ADDR_REG); + set_cbar(SOC_REGS_PHY_BASE + 0xC000); /* * We need to call mvebu_mbus_probe() before calling @@ -240,6 +248,13 @@ int cpu_eth_init(bd_t *bis) #ifndef CONFIG_SYS_DCACHE_OFF void enable_caches(void) { + struct pl310_regs *const pl310 = + (struct pl310_regs *)CONFIG_SYS_PL310_BASE; + + /* First disable L2 cache - may still be enable from BootROM */ + if (mvebu_soc_family() == MVEBU_SOC_A38X) + clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); + /* Avoid problem with e.g. neta ethernet driver */ invalidate_dcache_all(); |