diff options
author | Beniamino Galvani <b.galvani@gmail.com> | 2016-05-08 08:30:16 +0200 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2016-05-27 15:39:47 -0400 |
commit | bfcef28ae4cf04e7c1fd3aea1d60a17bd046f153 (patch) | |
tree | f9724e688585d0b157c6ba532b2723a4dd45e9ec /arch/arm/mach-meson/board.c | |
parent | 0e1a3e30deb089cba3f1c01a48443cf8a86b5398 (diff) | |
download | u-boot-imx-bfcef28ae4cf04e7c1fd3aea1d60a17bd046f153.zip u-boot-imx-bfcef28ae4cf04e7c1fd3aea1d60a17bd046f153.tar.gz u-boot-imx-bfcef28ae4cf04e7c1fd3aea1d60a17bd046f153.tar.bz2 |
arm: add initial support for Amlogic Meson and ODROID-C2
This adds platform code for the Amlogic Meson GXBaby (S905) SoC and a
board definition for ODROID-C2. This initial submission only supports
UART and Ethernet (through the existing Designware driver). DTS files
are the ones submitted to Linux arm-soc for 4.7 [1].
[1] https://patchwork.ozlabs.org/patch/603583/
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/arm/mach-meson/board.c')
-rw-r--r-- | arch/arm/mach-meson/board.c | 66 |
1 files changed, 66 insertions, 0 deletions
diff --git a/arch/arm/mach-meson/board.c b/arch/arm/mach-meson/board.c new file mode 100644 index 0000000..782f86c --- /dev/null +++ b/arch/arm/mach-meson/board.c @@ -0,0 +1,66 @@ +/* + * (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <libfdt.h> +#include <linux/err.h> +#include <asm/arch/gxbb.h> +#include <asm/armv8/mmu.h> +#include <asm/unaligned.h> + +DECLARE_GLOBAL_DATA_PTR; + +int dram_init(void) +{ + const fdt64_t *val; + int offset; + int len; + + offset = fdt_path_offset(gd->fdt_blob, "/memory"); + if (offset < 0) + return -EINVAL; + + val = fdt_getprop(gd->fdt_blob, offset, "reg", &len); + if (len < sizeof(*val) * 2) + return -EINVAL; + + /* Use unaligned access since cache is still disabled */ + gd->ram_size = get_unaligned_be64(&val[1]); + + return 0; +} + +void dram_init_banksize(void) +{ + /* Reserve first 16 MiB of RAM for firmware */ + gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE + (16 * 1024 * 1024); + gd->bd->bi_dram[0].size = gd->ram_size - (16 * 1024 * 1024); +} + +void reset_cpu(ulong addr) +{ + psci_system_reset(true); +} + +static struct mm_region gxbb_mem_map[] = { + { + .base = 0x0UL, + .size = 0x80000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE + }, { + .base = 0x80000000UL, + .size = 0x80000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + /* List terminator */ + 0, + } +}; + +struct mm_region *mem_map = gxbb_mem_map; |