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| author | Masahiro Yamada <yamada.m@jp.panasonic.com> | 2015-02-20 17:04:14 +0900 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2015-02-21 08:23:52 -0500 |
| commit | 3d357619a509eb2b39dc5056731ca08bc2b23e62 (patch) | |
| tree | 6728bbf4b4a903eec745e1876e24a219427a8f88 /arch/arm/mach-davinci/include/mach/timer_defs.h | |
| parent | af9308276028924ff7f84770ddbd26bd7046d6c5 (diff) | |
| download | u-boot-imx-3d357619a509eb2b39dc5056731ca08bc2b23e62.zip u-boot-imx-3d357619a509eb2b39dc5056731ca08bc2b23e62.tar.gz u-boot-imx-3d357619a509eb2b39dc5056731ca08bc2b23e62.tar.bz2 | |
ARM: davinci: move SoC headers to mach-davinci/include/mach
Move arch/arm/include/asm/arch-davinci/*
-> arch/arm/mach-davinci/include/mach/*
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Rini <trini@ti.com>
Diffstat (limited to 'arch/arm/mach-davinci/include/mach/timer_defs.h')
| -rw-r--r-- | arch/arm/mach-davinci/include/mach/timer_defs.h | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/arch/arm/mach-davinci/include/mach/timer_defs.h b/arch/arm/mach-davinci/include/mach/timer_defs.h new file mode 100644 index 0000000..94d1832 --- /dev/null +++ b/arch/arm/mach-davinci/include/mach/timer_defs.h @@ -0,0 +1,44 @@ +/* + * Copyright (C) 2011 DENX Software Engineering GmbH + * Heiko Schocher <hs@denx.de> + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#ifndef _TIMER_DEFS_H_ +#define _TIMER_DEFS_H_ + +struct davinci_timer { + u_int32_t pid12; + u_int32_t emumgt; + u_int32_t na1; + u_int32_t na2; + u_int32_t tim12; + u_int32_t tim34; + u_int32_t prd12; + u_int32_t prd34; + u_int32_t tcr; + u_int32_t tgcr; + u_int32_t wdtcr; +}; + +#define DV_TIMER_TCR_ENAMODE_MASK 3 + +#define DV_TIMER_TCR_ENAMODE12_SHIFT 6 +#define DV_TIMER_TCR_CLKSRC12_SHIFT 8 +#define DV_TIMER_TCR_READRSTMODE12_SHIFT 10 +#define DV_TIMER_TCR_CAPMODE12_SHIFT 11 +#define DV_TIMER_TCR_CAPVTMODE12_SHIFT 12 +#define DV_TIMER_TCR_ENAMODE34_SHIFT 22 +#define DV_TIMER_TCR_CLKSRC34_SHIFT 24 +#define DV_TIMER_TCR_READRSTMODE34_SHIFT 26 +#define DV_TIMER_TCR_CAPMODE34_SHIFT 27 +#define DV_TIMER_TCR_CAPEVTMODE12_SHIFT 28 + +#define DV_WDT_ENABLE_SYS_RESET 0x00020000 +#define DV_WDT_TRIGGER_SYS_RESET 0x00020002 + +#ifdef CONFIG_HW_WATCHDOG +void davinci_hw_watchdog_enable(void); +void davinci_hw_watchdog_reset(void); +#endif +#endif /* _TIMER_DEFS_H_ */ |