summaryrefslogtreecommitdiff
path: root/arch/arm/mach-at91
diff options
context:
space:
mode:
authorWenyou Yang <wenyou.yang@atmel.com>2016-02-03 10:20:43 +0800
committerAndreas Bießmann <andreas.devel@googlemail.com>2016-02-18 21:34:41 +0100
commitbe5e485cf995d916ec2e0d2381879ae205354e5c (patch)
treeb566dfb276fe4ec812ee357234290218622292f7 /arch/arm/mach-at91
parent8d233521cd5f26f093e2bf835118149fea4111c3 (diff)
downloadu-boot-imx-be5e485cf995d916ec2e0d2381879ae205354e5c.zip
u-boot-imx-be5e485cf995d916ec2e0d2381879ae205354e5c.tar.gz
u-boot-imx-be5e485cf995d916ec2e0d2381879ae205354e5c.tar.bz2
ARM: at91: clock: add PLLB enable/disable functions
To avoid the duplicated code, add the PLLB handle functions. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> Tested-by: Heiko Schocher <hs@denx.de> [add enable/disable functions to arm920t] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Diffstat (limited to 'arch/arm/mach-at91')
-rw-r--r--arch/arm/mach-at91/arm920t/clock.c38
-rw-r--r--arch/arm/mach-at91/arm926ejs/clock.c38
-rw-r--r--arch/arm/mach-at91/include/mach/clk.h2
3 files changed, 78 insertions, 0 deletions
diff --git a/arch/arm/mach-at91/arm920t/clock.c b/arch/arm/mach-at91/arm920t/clock.c
index 2813bf7..8aa2100 100644
--- a/arch/arm/mach-at91/arm920t/clock.c
+++ b/arch/arm/mach-at91/arm920t/clock.c
@@ -18,6 +18,8 @@
# error You need to define CONFIG_AT91FAMILY in your board config!
#endif
+#define EN_PLLB_TIMEOUT 500
+
DECLARE_GLOBAL_DATA_PTR;
static unsigned long at91_css_to_rate(unsigned long css)
@@ -155,3 +157,39 @@ int at91_clock_init(unsigned long main_clock)
return 0;
}
+
+int at91_pllb_clk_enable(u32 pllbr)
+{
+ struct at91_pmc *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
+ ulong start_time, tmp_time;
+
+ start_time = get_timer(0);
+ writel(pllbr, &pmc->pllbr);
+ while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB) {
+ tmp_time = get_timer(0);
+ if ((tmp_time - start_time) > EN_PLLB_TIMEOUT) {
+ printf("ERROR: failed to enable PLLB\n");
+ return -1;
+ }
+ }
+
+ return 0;
+}
+
+int at91_pllb_clk_disable(void)
+{
+ struct at91_pmc *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
+ ulong start_time, tmp_time;
+
+ start_time = get_timer(0);
+ writel(0, &pmc->pllbr);
+ while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != 0) {
+ tmp_time = get_timer(0);
+ if ((tmp_time - start_time) > EN_PLLB_TIMEOUT) {
+ printf("ERROR: failed to disable PLLB\n");
+ return -1;
+ }
+ }
+
+ return 0;
+}
diff --git a/arch/arm/mach-at91/arm926ejs/clock.c b/arch/arm/mach-at91/arm926ejs/clock.c
index c8b5e10..c8d24ae 100644
--- a/arch/arm/mach-at91/arm926ejs/clock.c
+++ b/arch/arm/mach-at91/arm926ejs/clock.c
@@ -18,6 +18,8 @@
# error You need to define CONFIG_AT91FAMILY in your board config!
#endif
+#define EN_PLLB_TIMEOUT 500
+
DECLARE_GLOBAL_DATA_PTR;
static unsigned long at91_css_to_rate(unsigned long css)
@@ -242,3 +244,39 @@ void at91_mck_init(u32 mckr)
while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY))
;
}
+
+int at91_pllb_clk_enable(u32 pllbr)
+{
+ struct at91_pmc *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
+ ulong start_time, tmp_time;
+
+ start_time = get_timer(0);
+ writel(pllbr, &pmc->pllbr);
+ while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB) {
+ tmp_time = get_timer(0);
+ if ((tmp_time - start_time) > EN_PLLB_TIMEOUT) {
+ printf("ERROR: failed to enable PLLB\n");
+ return -1;
+ }
+ }
+
+ return 0;
+}
+
+int at91_pllb_clk_disable(void)
+{
+ struct at91_pmc *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
+ ulong start_time, tmp_time;
+
+ start_time = get_timer(0);
+ writel(0, &pmc->pllbr);
+ while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != 0) {
+ tmp_time = get_timer(0);
+ if ((tmp_time - start_time) > EN_PLLB_TIMEOUT) {
+ printf("ERROR: failed to disable PLLB\n");
+ return -1;
+ }
+ }
+
+ return 0;
+}
diff --git a/arch/arm/mach-at91/include/mach/clk.h b/arch/arm/mach-at91/include/mach/clk.h
index b2604ef..64dec52 100644
--- a/arch/arm/mach-at91/include/mach/clk.h
+++ b/arch/arm/mach-at91/include/mach/clk.h
@@ -133,5 +133,7 @@ void at91_system_clk_disable(int sys_clk);
int at91_upll_clk_enable(void);
int at91_upll_clk_disable(void);
void at91_usb_clk_init(u32 value);
+int at91_pllb_clk_enable(u32 pllbr);
+int at91_pllb_clk_disable(void);
#endif /* __ASM_ARM_ARCH_CLK_H__ */