Merge branch 'master' of git://git.denx.de/u-boot-arm

Conflicts:
	boards.cfg

Signed-off-by: Stefano Babic <sbabic@denx.de>

8 files changed, 35 insertions, 15 deletions

diff --git a/arch/arm/include/asm/arch-fsl-lsch3/config.h b/arch/arm/include/asm/arch-fsl-lsch3/config.h
index c1c718e..b17410a 100644
--- a/arch/arm/include/asm/arch-fsl-lsch3/config.h
+++ b/arch/arm/include/asm/arch-fsl-lsch3/config.h
@@ -43,7 +43,11 @@
 /* DDR */
 #define CONFIG_SYS_FSL_DDR_LE
 #define CONFIG_VERY_BIG_RAM
+#ifdef CONFIG_SYS_FSL_DDR4
+#define CONFIG_SYS_FSL_DDRC_GEN4
+#else
 #define CONFIG_SYS_FSL_DDRC_ARM_GEN3	/* Enable Freescale ARM DDR3 driver */
+#endif
 #define CONFIG_SYS_FSL_DDR		/* Freescale DDR driver */
 #define CONFIG_SYS_LS2_DDR_BLOCK1_SIZE	((phys_size_t)2 << 30)
 #define CONFIG_MAX_MEM_MAPPED		CONFIG_SYS_LS2_DDR_BLOCK1_SIZE
diff --git a/arch/arm/include/asm/arch-kirkwood/kirkwood.h b/arch/arm/include/asm/arch-kirkwood/kirkwood.h
index bc207f5..3ea51d7 100644
--- a/arch/arm/include/asm/arch-kirkwood/kirkwood.h
+++ b/arch/arm/include/asm/arch-kirkwood/kirkwood.h
@@ -39,6 +39,7 @@
 #define KW_EGIGA0_BASE			(KW_REGISTER(0x72000))
 #define KW_EGIGA1_BASE			(KW_REGISTER(0x76000))
 #define KW_SATA_BASE			(KW_REGISTER(0x80000))
+#define KW_SDIO_BASE			(KW_REGISTER(0x90000))
 
 /* Kirkwood Sata controller has two ports */
 #define KW_SATA_PORT0_OFFSET		0x2000
diff --git a/arch/arm/include/asm/arch-s3c24x0/s3c2410.h b/arch/arm/include/asm/arch-s3c24x0/s3c2410.h
index 01fe0f2..ce4186f 100644
--- a/arch/arm/include/asm/arch-s3c24x0/s3c2410.h
+++ b/arch/arm/include/asm/arch-s3c24x0/s3c2410.h
@@ -139,9 +139,9 @@ static inline struct s3c24x0_spi *s3c24x0_get_base_spi(void)
 	return (struct s3c24x0_spi *)S3C24X0_SPI_BASE;
 }
 
-static inline struct s3c2410_sdi *s3c2410_get_base_sdi(void)
+static inline struct s3c24x0_sdi *s3c24x0_get_base_sdi(void)
 {
-	return (struct s3c2410_sdi *)S3C2410_SDI_BASE;
+	return (struct s3c24x0_sdi *)S3C2410_SDI_BASE;
 }
 
 #endif /*__S3C2410_H__*/
diff --git a/arch/arm/include/asm/arch-s3c24x0/s3c2440.h b/arch/arm/include/asm/arch-s3c24x0/s3c2440.h
index 15a7cb4..3f44bdc 100644
--- a/arch/arm/include/asm/arch-s3c24x0/s3c2440.h
+++ b/arch/arm/include/asm/arch-s3c24x0/s3c2440.h
@@ -137,9 +137,9 @@ static inline struct s3c24x0_spi *s3c24x0_get_base_spi(void)
 	return (struct s3c24x0_spi *)S3C24X0_SPI_BASE;
 }
 
-static inline struct s3c2440_sdi *s3c2440_get_base_sdi(void)
+static inline struct s3c24x0_sdi *s3c24x0_get_base_sdi(void)
 {
-	return (struct s3c2440_sdi *)S3C2440_SDI_BASE;
+	return (struct s3c24x0_sdi *)S3C2440_SDI_BASE;
 }
 
 #endif /*__S3C2440_H__*/
diff --git a/arch/arm/include/asm/arch-s3c24x0/s3c24x0.h b/arch/arm/include/asm/arch-s3c24x0/s3c24x0.h
index 86d720c..ed9df34 100644
--- a/arch/arm/include/asm/arch-s3c24x0/s3c24x0.h
+++ b/arch/arm/include/asm/arch-s3c24x0/s3c24x0.h
@@ -675,7 +675,7 @@ struct s3c2400_mmc {
 
 
 /* SD INTERFACE (see S3C2410 manual chapter 19) */
-struct s3c2410_sdi {
+struct s3c24x0_sdi {
 	u32	sdicon;
 	u32	sdipre;
 	u32	sdicarg;
@@ -691,14 +691,19 @@ struct s3c2410_sdi {
 	u32	sdidcnt;
 	u32	sdidsta;
 	u32	sdifsta;
-#ifdef __BIG_ENDIAN
-	u8	res[3];
-	u8	sdidat;
+#ifdef CONFIG_S3C2410
+	u32	sdidat;
+	u32	sdiimsk;
 #else
-	u8	sdidat;
-	u8	res[3];
-#endif
 	u32	sdiimsk;
+	u32	sdidat;
+#endif
 };
 
+#ifdef CONFIG_CMD_MMC
+#include <mmc.h>
+int s3cmmc_initialize(bd_t *bis, int (*getcd)(struct mmc *),
+		      int (*getwp)(struct mmc *));
+#endif
+
 #endif /*__S3C24X0_H__*/
diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun4i.h b/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
index 928f3f2..1ba997a 100644
--- a/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
+++ b/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
@@ -218,10 +218,13 @@ struct sunxi_ccm_reg {
 #define CCM_PLL5_CTRL_BYPASS (0x1 << 30)
 #define CCM_PLL5_CTRL_EN (0x1 << 31)
 
-#define CCM_PLL6_CTRL_N_SHIFT	8
-#define CCM_PLL6_CTRL_N_MASK	(0x1f << CCM_PLL6_CTRL_N_SHIFT)
-#define CCM_PLL6_CTRL_K_SHIFT	4
-#define CCM_PLL6_CTRL_K_MASK	(0x3 << CCM_PLL6_CTRL_K_SHIFT)
+#define CCM_PLL6_CTRL_EN		31
+#define CCM_PLL6_CTRL_BYPASS_EN		30
+#define CCM_PLL6_CTRL_SATA_EN_SHIFT	14
+#define CCM_PLL6_CTRL_N_SHIFT		8
+#define CCM_PLL6_CTRL_N_MASK		(0x1f << CCM_PLL6_CTRL_N_SHIFT)
+#define CCM_PLL6_CTRL_K_SHIFT		4
+#define CCM_PLL6_CTRL_K_MASK		(0x3 << CCM_PLL6_CTRL_K_SHIFT)
 
 #define CCM_GPS_CTRL_RESET (0x1 << 0)
 #define CCM_GPS_CTRL_GATE (0x1 << 1)
@@ -253,4 +256,8 @@ struct sunxi_ccm_reg {
 #define CCM_GMAC_CTRL_GPIT_MII (0x0 << 2)
 #define CCM_GMAC_CTRL_GPIT_RGMII (0x1 << 2)
 
+#define CCM_USB_CTRL_PHY1_RST (0x1 << 1)
+#define CCM_USB_CTRL_PHY2_RST (0x1 << 2)
+#define CCM_USB_CTRL_PHYGATE (0x1 << 8)
+
 #endif /* _SUNXI_CLOCK_SUN4I_H */
diff --git a/arch/arm/include/asm/config.h b/arch/arm/include/asm/config.h
index d3433da..5f2a5f4 100644
--- a/arch/arm/include/asm/config.h
+++ b/arch/arm/include/asm/config.h
@@ -7,7 +7,9 @@
 #ifndef _ASM_CONFIG_H_
 #define _ASM_CONFIG_H_
 
+#ifdef __aarch64__
 #define CONFIG_SYS_GENERIC_GLOBAL_DATA
+#endif
 
 #define CONFIG_LMB
 #define CONFIG_SYS_BOOT_RAMDISK_HIGH
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index 214f3ea..6d18eb3 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -136,6 +136,7 @@ extern inline void __raw_readsl(unsigned long addr, void *data, int longlen)
  * TODO: The kernel offers some more advanced versions of barriers, it might
  * have some advantages to use them instead of the simple one here.
  */
+#define mb()		asm volatile("dsb sy" : : : "memory")
 #define dmb()		__asm__ __volatile__ ("" : : : "memory")
 #define __iormb()	dmb()
 #define __iowmb()	dmb()