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| author | Michal Simek <michal.simek@xilinx.com> | 2015-07-23 12:03:55 +0200 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2015-07-28 11:56:27 +0200 |
| commit | cb7ea82059069c6509c26b1f705982c6a919a3fe (patch) | |
| tree | 93e4295abe6611457d95008291318581f8da8064 /arch/arm/include | |
| parent | 6d6e3dbefe1a518bc8fb6a23808770568ff4c125 (diff) | |
| download | u-boot-imx-cb7ea82059069c6509c26b1f705982c6a919a3fe.zip u-boot-imx-cb7ea82059069c6509c26b1f705982c6a919a3fe.tar.gz u-boot-imx-cb7ea82059069c6509c26b1f705982c6a919a3fe.tar.bz2 | |
ARM: zynqmp: Wire up ethernet controllers
Wire up ethernet controllers and enable MII and BOOTP options.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/arm/include')
| -rw-r--r-- | arch/arm/include/asm/arch-zynqmp/hardware.h | 5 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-zynqmp/sys_proto.h | 5 |
2 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-zynqmp/hardware.h b/arch/arm/include/asm/arch-zynqmp/hardware.h index 15bd519..5d191e8 100644 --- a/arch/arm/include/asm/arch-zynqmp/hardware.h +++ b/arch/arm/include/asm/arch-zynqmp/hardware.h @@ -11,6 +11,11 @@ #define ZYNQ_SERIAL_BASEADDR0 0xFF000000 #define ZYNQ_SERIAL_BASEADDR1 0xFF001000 +#define ZYNQ_GEM_BASEADDR0 0xFF0B0000 +#define ZYNQ_GEM_BASEADDR1 0xFF0C0000 +#define ZYNQ_GEM_BASEADDR2 0xFF0D0000 +#define ZYNQ_GEM_BASEADDR3 0xFF0E0000 + #define ZYNQ_SPI_BASEADDR0 0xFF040000 #define ZYNQ_SPI_BASEADDR1 0xFF050000 diff --git a/arch/arm/include/asm/arch-zynqmp/sys_proto.h b/arch/arm/include/asm/arch-zynqmp/sys_proto.h index 3ca15cb..f5c90d1 100644 --- a/arch/arm/include/asm/arch-zynqmp/sys_proto.h +++ b/arch/arm/include/asm/arch-zynqmp/sys_proto.h @@ -8,6 +8,11 @@ #ifndef _ASM_ARCH_SYS_PROTO_H #define _ASM_ARCH_SYS_PROTO_H +/* Setup clk for network */ +static inline void zynq_slcr_gem_clk_setup(u32 gem_id, unsigned long clk_rate) +{ +} + int zynq_sdhci_init(unsigned long regbase); int zynq_slcr_get_mio_pin_status(const char *periph); |