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| author | Nishanth Menon <nm@ti.com> | 2015-03-09 17:12:00 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2015-03-13 09:28:48 -0400 |
| commit | b45c48a7c30734272371fede01e96f499a314664 (patch) | |
| tree | f419e13accf870c448e231c9702b656957767aef /arch/arm/include | |
| parent | c616a0df297e886f09bf88523bcd03a86bdf8704 (diff) | |
| download | u-boot-imx-b45c48a7c30734272371fede01e96f499a314664.zip u-boot-imx-b45c48a7c30734272371fede01e96f499a314664.tar.gz u-boot-imx-b45c48a7c30734272371fede01e96f499a314664.tar.bz2 | |
ARM: Introduce erratum workaround for 454179
454179: Stale prediction may inhibit target address misprediction on
next predicted taken branch
Impacts: Every Cortex-A8 processors with revision lower than r2p1
Work around: Set IBE and disable branch size mispredict to 1
Also provide a hook for SoC specific handling to take place if needed.
Based on ARM errata Document revision 20.0 (13 Nov 2010)
Signed-off-by: Nishanth Menon <nm@ti.com>
Tested-by: Matt Porter <mporter@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/arm/include')
| -rw-r--r-- | arch/arm/include/asm/armv7.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/include/asm/armv7.h b/arch/arm/include/asm/armv7.h index cd40912..58d8b16 100644 --- a/arch/arm/include/asm/armv7.h +++ b/arch/arm/include/asm/armv7.h @@ -140,6 +140,8 @@ extern char __secure_end[]; void v7_arch_cp15_set_l2aux_ctrl(u32 l2auxctrl, u32 cpu_midr, u32 cpu_rev_comb, u32 cpu_variant, u32 cpu_rev); +void v7_arch_cp15_set_acr(u32 acr, u32 cpu_midr, u32 cpu_rev_comb, + u32 cpu_variant, u32 cpu_rev); #endif /* ! __ASSEMBLY__ */ #endif |