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| author | Stefan Roese <sr@denx.de> | 2015-01-19 11:33:42 +0100 |
|---|---|---|
| committer | Luka Perkov <luka.perkov@sartura.hr> | 2015-02-06 17:24:56 +0100 |
| commit | b0f80b913f5a8aec8ba75093328ac17d178c3b95 (patch) | |
| tree | 8ff1efd290cf4720365af982990358d86ca41555 /arch/arm/include | |
| parent | 0cf47862bf647690762c841e247fb5b097ca7316 (diff) | |
| download | u-boot-imx-b0f80b913f5a8aec8ba75093328ac17d178c3b95.zip u-boot-imx-b0f80b913f5a8aec8ba75093328ac17d178c3b95.tar.gz u-boot-imx-b0f80b913f5a8aec8ba75093328ac17d178c3b95.tar.bz2 | |
arm: armada-xp: Add SPL support used to include the DDR training code
This patch adds SPL support to the Marvell Armada-XP. With this addition
the bin_hdr integration is not needed any more. The SPL will first
initialize the serdes/PHY and the call the DDR setup and training code
now integrated into mainline U-Boot.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Luka Perkov <luka.perkov@sartura.hr>
Diffstat (limited to 'arch/arm/include')
| -rw-r--r-- | arch/arm/include/asm/arch-armada-xp/cpu.h | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-armada-xp/cpu.h b/arch/arm/include/asm/arch-armada-xp/cpu.h index 4341799..4f5ff96 100644 --- a/arch/arm/include/asm/arch-armada-xp/cpu.h +++ b/arch/arm/include/asm/arch-armada-xp/cpu.h @@ -106,5 +106,18 @@ unsigned int mvebu_sdram_bar(enum memory_bank bank); unsigned int mvebu_sdram_bs(enum memory_bank bank); void mvebu_sdram_size_adjust(enum memory_bank bank); int mvebu_mbus_probe(struct mbus_win windows[], int count); + +/* + * Highspeed SERDES PHY config init, ported from bin_hdr + * to mainline U-Boot + */ +int serdes_phy_config(void); + +/* + * DDR3 init / training code ported from Marvell bin_hdr. Now + * available in mainline U-Boot in: + * drivers/ddr/mvebu/ + */ +int ddr3_init(void); #endif /* __ASSEMBLY__ */ #endif /* _ARMADA_XP_CPU_H */ |