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| author | Nishanth Menon <nm@ti.com> | 2015-08-13 09:51:00 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2015-08-28 12:33:13 -0400 |
| commit | 76cff2b10857c86211ef60024e672ce178cb6d69 (patch) | |
| tree | fdf9d2554b43cbcd5e08c0c0e51b2344a8224896 /arch/arm/include | |
| parent | 03589234090db645f80896a2ee5bce98096172da (diff) | |
| download | u-boot-imx-76cff2b10857c86211ef60024e672ce178cb6d69.zip u-boot-imx-76cff2b10857c86211ef60024e672ce178cb6d69.tar.gz u-boot-imx-76cff2b10857c86211ef60024e672ce178cb6d69.tar.bz2 | |
ARM: DRA74-evm: Use SMA_1 spare register to workaround DP83865 phy on SR2.0
DP83865 ethernet phy used on DRA74x-evm is quirky and the datasheet
provided IODELAY values for standard RGMII phys do not work.
Silicon Revision(SR) 2.0 provides an alternative bit configuration
that allows us to do a "gross adjustment" to launch the data off a
different internal clock edge. Manual IO Delay overrides are still
necessary to fine tune the clock-to-data delays. This is a necessary
workaround for the quirky ethernet Phy we have on the platform.
NOTE: SMA registers are spare "kitchen sink" registers that does
contain bits for other workaround as necessary as well. Hence the
control for the same is introduced in a generic SoC specific, board
generic location.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/arm/include')
| -rw-r--r-- | arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h | 4 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-omap5/omap.h | 2 | ||||
| -rw-r--r-- | arch/arm/include/asm/omap_common.h | 1 |
3 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h b/arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h index 2f53d85..4cd0a3c 100644 --- a/arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h +++ b/arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h @@ -49,6 +49,10 @@ #define ISOLATE_IO 1 #define DEISOLATE_IO 0 +/* CTRL_CORE_SMA_SW_1 */ +#define RGMII2_ID_MODE_N_MASK (1 << 26) +#define RGMII1_ID_MODE_N_MASK (1 << 25) + /* PRM_IO_PMCTRL */ #define PMCTRL_ISOCLK_OVERRIDE_SHIFT 0 #define PMCTRL_ISOCLK_OVERRIDE_MASK (1 << 0) diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h index ddf5c7a..c329641 100644 --- a/arch/arm/include/asm/arch-omap5/omap.h +++ b/arch/arm/include/asm/arch-omap5/omap.h @@ -235,6 +235,8 @@ struct ctrl_ioregs { u32 ctrl_ddr_ctrl_ext_0; }; +void clrset_spare_register(u8 spare_type, u32 clear_bits, u32 set_bits); + #endif /* __ASSEMBLY__ */ /* Boot parameters */ diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h index 000a533..2461667 100644 --- a/arch/arm/include/asm/omap_common.h +++ b/arch/arm/include/asm/omap_common.h @@ -466,6 +466,7 @@ struct omap_sys_ctrl_regs { u32 control_padconf_wkup_base; u32 iodelay_config_base; u32 ctrl_core_sma_sw_0; + u32 ctrl_core_sma_sw_1; }; struct dpll_params { |