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| author | SRICHARAN R <r.sricharan@ti.com> | 2013-02-12 01:33:43 +0000 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2013-03-11 11:06:10 -0400 |
| commit | 47abc3df701d8bc26f311350aa523fc1d0f8ad4e (patch) | |
| tree | 057c11204cfdc270720f49af35258b2708caa6e4 /arch/arm/include | |
| parent | afc2f9dcf1a4a478e51a84b1a162bca19c7b7715 (diff) | |
| download | u-boot-imx-47abc3df701d8bc26f311350aa523fc1d0f8ad4e.zip u-boot-imx-47abc3df701d8bc26f311350aa523fc1d0f8ad4e.tar.gz u-boot-imx-47abc3df701d8bc26f311350aa523fc1d0f8ad4e.tar.bz2 | |
ARM: OMAP4/5: clocks: Add the required OPP settings as per the latest addendum
Change OPP settings as per the latest 0.5 version of
addendum for OMAP5430 ES2.0. omap4/hw_data.c is touched
here to add dummy dividers.
While here correcting OPP_NOM mpu, core frequency for
OMAP4430 ES2.x
Note that OMAP5430 ES1.0 support is still kept alive and
would be removed in a cleanup later.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Cc: Tom Rini <trini@ti.com>
Cc: Nishanth Menon <nm@ti.com>
Diffstat (limited to 'arch/arm/include')
| -rw-r--r-- | arch/arm/include/asm/arch-omap5/clocks.h | 29 | ||||
| -rw-r--r-- | arch/arm/include/asm/omap_common.h | 6 |
2 files changed, 26 insertions, 9 deletions
diff --git a/arch/arm/include/asm/arch-omap5/clocks.h b/arch/arm/include/asm/arch-omap5/clocks.h index 15362ae..6ee40be 100644 --- a/arch/arm/include/asm/arch-omap5/clocks.h +++ b/arch/arm/include/asm/arch-omap5/clocks.h @@ -176,9 +176,9 @@ /* CM_MPU_MPU_CLKCTRL */ #define MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_SHIFT 24 -#define MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_MASK (1 << 24) -#define MPU_CLKCTRL_CLKSEL_ABE_DIV_MODE_SHIFT 25 -#define MPU_CLKCTRL_CLKSEL_ABE_DIV_MODE_MASK (1 << 25) +#define MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_MASK (3 << 24) +#define MPU_CLKCTRL_CLKSEL_ABE_DIV_MODE_SHIFT 26 +#define MPU_CLKCTRL_CLKSEL_ABE_DIV_MODE_MASK (1 << 26) /* CM_WKUPAON_SCRM_CLKCTRL */ #define OPTFCLKEN_SCRM_PER_SHIFT 9 @@ -201,12 +201,25 @@ #define SMPS_REG_ADDR_8_CORE 0x37 /* PALMAS VOLTAGE SETTINGS in mv for OPP_NOMINAL */ -#define VDD_MPU 1000 -#define VDD_MM 1000 +/* ES1.0 settings */ +#define VDD_MPU 1040 +#define VDD_MM 1040 #define VDD_CORE 1040 -#define VDD_MPU_5432 1150 -#define VDD_MM_5432 1150 -#define VDD_CORE_5432 1150 + +#define VDD_MPU_LOW 890 +#define VDD_MM_LOW 890 +#define VDD_CORE_LOW 890 + +/* ES2.0 settings */ +#define VDD_MPU_ES2 1060 +#define VDD_MM_ES2 1025 +#define VDD_CORE_ES2 1040 + +#define VDD_MPU_ES2_HIGH 1250 +#define VDD_MM_ES2_OD 1120 + +#define VDD_MPU_ES2_LOW 880 +#define VDD_MM_ES2_LOW 880 /* Standard offset is 0.5v expressed in uv */ #define PALMAS_SMPS_BASE_VOLT_UV 500000 diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h index 08395ca..8a886ec 100644 --- a/arch/arm/include/asm/omap_common.h +++ b/arch/arm/include/asm/omap_common.h @@ -426,8 +426,10 @@ struct dpll_params { s8 m5_h12; s8 m6_h13; s8 m7_h14; + s8 h21; s8 h22; s8 h23; + s8 h24; }; struct dpll_regs { @@ -441,9 +443,11 @@ struct dpll_regs { u32 cm_div_m5_h12_dpll; u32 cm_div_m6_h13_dpll; u32 cm_div_m7_h14_dpll; - u32 reserved[3]; + u32 reserved[2]; + u32 cm_div_h21_dpll; u32 cm_div_h22_dpll; u32 cm_div_h23_dpll; + u32 cm_div_h24_dpll; }; struct dplls { |