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authorMichal Simek <michal.simek@xilinx.com>2015-07-22 09:27:11 +0200
committerMichal Simek <michal.simek@xilinx.com>2015-07-28 11:56:20 +0200
commit225bf9aa65ac2131b8e55fd81019d73c2c1c0586 (patch)
tree93b0d857fa8f0a7ab3c6b3cff24bf0038302daba /arch/arm/include
parentfb101168faef4dcc46243b38429193bc7c416885 (diff)
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zynqmp: Add support for IP detection via SLCR
SLCR can be used for IP configuration setting. Add SLCR skeleton to enable run time checking. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/arch-zynqmp/hardware.h9
-rw-r--r--arch/arm/include/asm/arch-zynqmp/sys_proto.h1
2 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-zynqmp/hardware.h b/arch/arm/include/asm/arch-zynqmp/hardware.h
index c9dc49d..15bd519 100644
--- a/arch/arm/include/asm/arch-zynqmp/hardware.h
+++ b/arch/arm/include/asm/arch-zynqmp/hardware.h
@@ -55,6 +55,15 @@ struct iou_scntr {
#define EMMC_MODE 0x00000006
#define JTAG_MODE 0x00000000
+#define ZYNQMP_IOU_SLCR_BASEADDR 0xFF180000
+
+struct iou_slcr_regs {
+ u32 mio_pin[78];
+ u32 reserved[442];
+};
+
+#define slcr_base ((struct iou_slcr_regs *)ZYNQMP_IOU_SLCR_BASEADDR)
+
#define ZYNQMP_RPU_BASEADDR 0xFF9A0000
struct rpu_regs {
diff --git a/arch/arm/include/asm/arch-zynqmp/sys_proto.h b/arch/arm/include/asm/arch-zynqmp/sys_proto.h
index d8e0ba1..3ca15cb 100644
--- a/arch/arm/include/asm/arch-zynqmp/sys_proto.h
+++ b/arch/arm/include/asm/arch-zynqmp/sys_proto.h
@@ -9,6 +9,7 @@
#define _ASM_ARCH_SYS_PROTO_H
int zynq_sdhci_init(unsigned long regbase);
+int zynq_slcr_get_mio_pin_status(const char *periph);
unsigned int zynqmp_get_silicon_version(void);