MX6: drop binary constants from iomux header

Constants set with binary value (0b...) are not compiled
from old toolchain when used by the clrsetbits_le32 macro.
Replaces them with the corresponding hex value.

The error reported (for example with the mx6qsabrelite board)
is something like:

mx6qsabrelite.c:369:1: error: invalid suffix "b101" on integer constant
mx6qsabrelite.c:369:1: error: invalid suffix "b10010" on integer constant
mx6qsabrelite.c:369:1: error: invalid suffix "b0000" on integer constant
mx6qsabrelite.c:369:1: error: invalid suffix "b10001" on integer constant

Signed-off-by: Stefano Babic <sbabic@denx.de>

1 files changed, 62 insertions, 62 deletions

diff --git a/arch/arm/include/asm/arch-mx6/iomux.h b/arch/arm/include/asm/arch-mx6/iomux.h
index a1255f9..d23abd7 100644
--- a/arch/arm/include/asm/arch-mx6/iomux.h
+++ b/arch/arm/include/asm/arch-mx6/iomux.h
@@ -34,21 +34,21 @@
 #define IOMUXC_GPR13_SATA_PHY_2_MASK	(0x1f<<2)
 #define IOMUXC_GPR13_SATA_PHY_1_MASK	(3<<0)
 
-#define IOMUXC_GPR13_SATA_PHY_8_RXEQ_0P5DB	(0b000<<24)
-#define IOMUXC_GPR13_SATA_PHY_8_RXEQ_1P0DB	(0b001<<24)
-#define IOMUXC_GPR13_SATA_PHY_8_RXEQ_1P5DB	(0b010<<24)
-#define IOMUXC_GPR13_SATA_PHY_8_RXEQ_2P0DB	(0b011<<24)
-#define IOMUXC_GPR13_SATA_PHY_8_RXEQ_2P5DB	(0b100<<24)
-#define IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P0DB	(0b101<<24)
-#define IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P5DB	(0b110<<24)
-#define IOMUXC_GPR13_SATA_PHY_8_RXEQ_4P0DB	(0b111<<24)
+#define IOMUXC_GPR13_SATA_PHY_8_RXEQ_0P5DB	(0<<24)
+#define IOMUXC_GPR13_SATA_PHY_8_RXEQ_1P0DB	(1<<24)
+#define IOMUXC_GPR13_SATA_PHY_8_RXEQ_1P5DB	(2<<24)
+#define IOMUXC_GPR13_SATA_PHY_8_RXEQ_2P0DB	(3<<24)
+#define IOMUXC_GPR13_SATA_PHY_8_RXEQ_2P5DB	(4<<24)
+#define IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P0DB	(5<<24)
+#define IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P5DB	(6<<24)
+#define IOMUXC_GPR13_SATA_PHY_8_RXEQ_4P0DB	(7<<24)
 
-#define IOMUXC_GPR13_SATA_PHY_7_SATA1I	(0b10000<<19)
-#define IOMUXC_GPR13_SATA_PHY_7_SATA1M	(0b10000<<19)
-#define IOMUXC_GPR13_SATA_PHY_7_SATA1X	(0b11010<<19)
-#define IOMUXC_GPR13_SATA_PHY_7_SATA2I	(0b10010<<19)
-#define IOMUXC_GPR13_SATA_PHY_7_SATA2M	(0b10010<<19)
-#define IOMUXC_GPR13_SATA_PHY_7_SATA2X	(0b11010<<19)
+#define IOMUXC_GPR13_SATA_PHY_7_SATA1I	(0x10<<19)
+#define IOMUXC_GPR13_SATA_PHY_7_SATA1M	(0x10<<19)
+#define IOMUXC_GPR13_SATA_PHY_7_SATA1X	(0x1A<<19)
+#define IOMUXC_GPR13_SATA_PHY_7_SATA2I	(0x12<<19)
+#define IOMUXC_GPR13_SATA_PHY_7_SATA2M	(0x12<<19)
+#define IOMUXC_GPR13_SATA_PHY_7_SATA2X	(0x1A<<19)
 
 #define IOMUXC_GPR13_SATA_SPEED_1P5G	(0<<15)
 #define IOMUXC_GPR13_SATA_SPEED_3G	(1<<15)
@@ -63,55 +63,55 @@
 #define IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_9_16		(4<<11)
 #define IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_8_16		(5<<11)
 
-#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P00_DB	(0b0000<<7)
-#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P37_DB	(0b0001<<7)
-#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P74_DB	(0b0010<<7)
-#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_1P11_DB	(0b0011<<7)
-#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_1P48_DB	(0b0100<<7)
-#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_1P85_DB	(0b0101<<7)
-#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_2P22_DB	(0b0110<<7)
-#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_2P59_DB	(0b0111<<7)
-#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_2P96_DB	(0b1000<<7)
-#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_3P33_DB	(0b1001<<7)
-#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_3P70_DB	(0b1010<<7)
-#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_4P07_DB	(0b1011<<7)
-#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_4P44_DB	(0b1100<<7)
-#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_4P81_DB	(0b1101<<7)
-#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_5P28_DB	(0b1110<<7)
-#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_5P75_DB	(0b1111<<7)
+#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P00_DB	(0<<7)
+#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P37_DB	(1<<7)
+#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P74_DB	(2<<7)
+#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_1P11_DB	(3<<7)
+#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_1P48_DB	(4<<7)
+#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_1P85_DB	(5<<7)
+#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_2P22_DB	(6<<7)
+#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_2P59_DB	(7<<7)
+#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_2P96_DB	(8<<7)
+#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_3P33_DB	(9<<7)
+#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_3P70_DB	(0xA<<7)
+#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_4P07_DB	(0xB<<7)
+#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_4P44_DB	(0xC<<7)
+#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_4P81_DB	(0xD<<7)
+#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_5P28_DB	(0xE<<7)
+#define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_5P75_DB	(0xF<<7)
 
-#define IOMUXC_GPR13_SATA_PHY_2_TX_0P937V	(0b00000<<2)
-#define IOMUXC_GPR13_SATA_PHY_2_TX_0P947V	(0b00001<<2)
-#define IOMUXC_GPR13_SATA_PHY_2_TX_0P957V	(0b00010<<2)
-#define IOMUXC_GPR13_SATA_PHY_2_TX_0P966V	(0b00011<<2)
-#define IOMUXC_GPR13_SATA_PHY_2_TX_0P976V	(0b00100<<2)
-#define IOMUXC_GPR13_SATA_PHY_2_TX_0P986V	(0b00101<<2)
-#define IOMUXC_GPR13_SATA_PHY_2_TX_0P996V	(0b00110<<2)
-#define IOMUXC_GPR13_SATA_PHY_2_TX_1P005V	(0b00111<<2)
-#define IOMUXC_GPR13_SATA_PHY_2_TX_1P015V	(0b01000<<2)
-#define IOMUXC_GPR13_SATA_PHY_2_TX_1P025V	(0b01001<<2)
-#define IOMUXC_GPR13_SATA_PHY_2_TX_1P035V	(0b01010<<2)
-#define IOMUXC_GPR13_SATA_PHY_2_TX_1P045V	(0b01011<<2)
-#define IOMUXC_GPR13_SATA_PHY_2_TX_1P054V	(0b01100<<2)
-#define IOMUXC_GPR13_SATA_PHY_2_TX_1P064V	(0b01101<<2)
-#define IOMUXC_GPR13_SATA_PHY_2_TX_1P074V	(0b01110<<2)
-#define IOMUXC_GPR13_SATA_PHY_2_TX_1P084V	(0b01111<<2)
-#define IOMUXC_GPR13_SATA_PHY_2_TX_1P094V	(0b10000<<2)
-#define IOMUXC_GPR13_SATA_PHY_2_TX_1P104V	(0b10001<<2)
-#define IOMUXC_GPR13_SATA_PHY_2_TX_1P113V	(0b10010<<2)
-#define IOMUXC_GPR13_SATA_PHY_2_TX_1P123V	(0b10011<<2)
-#define IOMUXC_GPR13_SATA_PHY_2_TX_1P133V	(0b10100<<2)
-#define IOMUXC_GPR13_SATA_PHY_2_TX_1P143V	(0b10101<<2)
-#define IOMUXC_GPR13_SATA_PHY_2_TX_1P152V	(0b10110<<2)
-#define IOMUXC_GPR13_SATA_PHY_2_TX_1P162V	(0b10111<<2)
-#define IOMUXC_GPR13_SATA_PHY_2_TX_1P172V	(0b11000<<2)
-#define IOMUXC_GPR13_SATA_PHY_2_TX_1P182V	(0b11001<<2)
-#define IOMUXC_GPR13_SATA_PHY_2_TX_1P191V	(0b11010<<2)
-#define IOMUXC_GPR13_SATA_PHY_2_TX_1P201V	(0b11011<<2)
-#define IOMUXC_GPR13_SATA_PHY_2_TX_1P211V	(0b11100<<2)
-#define IOMUXC_GPR13_SATA_PHY_2_TX_1P221V	(0b11101<<2)
-#define IOMUXC_GPR13_SATA_PHY_2_TX_1P230V	(0b11110<<2)
-#define IOMUXC_GPR13_SATA_PHY_2_TX_1P240V	(0b11111<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_0P937V	(0<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_0P947V	(1<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_0P957V	(2<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_0P966V	(3<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_0P976V	(4<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_0P986V	(5<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_0P996V	(6<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P005V	(7<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P015V	(8<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P025V	(9<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P035V	(0xA<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P045V	(0xB<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P054V	(0xC<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P064V	(0xD<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P074V	(0xE<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P084V	(0xF<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P094V	(0x10<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P104V	(0x11<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P113V	(0x12<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P123V	(0x13<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P133V	(0x14<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P143V	(0x15<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P152V	(0x16<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P162V	(0x17<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P172V	(0x18<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P182V	(0x19<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P191V	(0x1A<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P201V	(0x1B<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P211V	(0x1C<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P221V	(0x1D<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P230V	(0x1E<<2)
+#define IOMUXC_GPR13_SATA_PHY_2_TX_1P240V	(0x1F<<2)
 
 #define IOMUXC_GPR13_SATA_PHY_1_FAST	0
 #define IOMUXC_GPR13_SATA_PHY_1_MEDIUM	1