ARM: tegra: pinctrl: remove vddio

This field isn't used anywhere, so remove it. Note that PIN() macros are
left unchanged for now, to avoid many diffs to them; later commits will
completely rewrite them just one time.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>

4 files changed, 0 insertions, 78 deletions

diff --git a/arch/arm/include/asm/arch-tegra114/pinmux.h b/arch/arm/include/asm/arch-tegra114/pinmux.h
index edf1a89..93d2ca5 100644
--- a/arch/arm/include/asm/arch-tegra114/pinmux.h
+++ b/arch/arm/include/asm/arch-tegra114/pinmux.h
@@ -449,27 +449,6 @@ enum pmux_pin_rcv_sel {
 				(((rcv_sel) >= PMUX_PIN_RCV_SEL_DEFAULT) && \
 				((rcv_sel) <= PMUX_PIN_RCV_SEL_HIGH))
 
-/* Available power domains used by pin groups */
-enum pmux_vddio {
-	PMUX_VDDIO_BB = 0,
-	PMUX_VDDIO_LCD,
-	PMUX_VDDIO_VI,
-	PMUX_VDDIO_UART,
-	PMUX_VDDIO_DDR,
-	PMUX_VDDIO_NAND,
-	PMUX_VDDIO_SYS,
-	PMUX_VDDIO_AUDIO,
-	PMUX_VDDIO_SD,
-	PMUX_VDDIO_CAM,
-	PMUX_VDDIO_GMI,
-	PMUX_VDDIO_PEXCTL,
-	PMUX_VDDIO_SDMMC1,
-	PMUX_VDDIO_SDMMC3,
-	PMUX_VDDIO_SDMMC4,
-
-	PMUX_VDDIO_NONE
-};
-
 #define PGRP_SLWF_NONE	-1
 #define PGRP_SLWF_MAX	3
 #define PGRP_SLWR_NONE	PGRP_SLWF_NONE
diff --git a/arch/arm/include/asm/arch-tegra124/pinmux.h b/arch/arm/include/asm/arch-tegra124/pinmux.h
index f51f44a..2042f1f 100644
--- a/arch/arm/include/asm/arch-tegra124/pinmux.h
+++ b/arch/arm/include/asm/arch-tegra124/pinmux.h
@@ -458,27 +458,6 @@ enum pmux_pin_rcv_sel {
 				(((rcv_sel) >= PMUX_PIN_RCV_SEL_DEFAULT) && \
 				((rcv_sel) <= PMUX_PIN_RCV_SEL_HIGH))
 
-/* Available power domains used by pin groups */
-enum pmux_vddio {
-	PMUX_VDDIO_BB = 0,
-	PMUX_VDDIO_LCD,
-	PMUX_VDDIO_VI,
-	PMUX_VDDIO_UART,
-	PMUX_VDDIO_DDR,
-	PMUX_VDDIO_NAND,
-	PMUX_VDDIO_SYS,
-	PMUX_VDDIO_AUDIO,
-	PMUX_VDDIO_SD,
-	PMUX_VDDIO_CAM,
-	PMUX_VDDIO_GMI,
-	PMUX_VDDIO_PEXCTL,
-	PMUX_VDDIO_SDMMC1,
-	PMUX_VDDIO_SDMMC3,
-	PMUX_VDDIO_SDMMC4,
-
-	PMUX_VDDIO_NONE
-};
-
 #define PGRP_SLWF_NONE	-1
 #define PGRP_SLWF_MAX	3
 #define PGRP_SLWR_NONE	PGRP_SLWF_NONE
diff --git a/arch/arm/include/asm/arch-tegra20/pinmux.h b/arch/arm/include/asm/arch-tegra20/pinmux.h
index 3374d9c..2bfaf53 100644
--- a/arch/arm/include/asm/arch-tegra20/pinmux.h
+++ b/arch/arm/include/asm/arch-tegra20/pinmux.h
@@ -257,21 +257,6 @@ enum pmux_tristate {
 	PMUX_TRI_TRISTATE = 1,
 };
 
-/* Available power domains used by pin groups */
-enum pmux_vddio {
-	PMUX_VDDIO_BB = 0,
-	PMUX_VDDIO_LCD,
-	PMUX_VDDIO_VI,
-	PMUX_VDDIO_UART,
-	PMUX_VDDIO_DDR,
-	PMUX_VDDIO_NAND,
-	PMUX_VDDIO_SYS,
-	PMUX_VDDIO_AUDIO,
-	PMUX_VDDIO_SD,
-
-	PMUX_VDDIO_NONE
-};
-
 enum {
 	PMUX_TRISTATE_REGS	= 4,
 	PMUX_MUX_REGS		= 7,
diff --git a/arch/arm/include/asm/arch-tegra30/pinmux.h b/arch/arm/include/asm/arch-tegra30/pinmux.h
index ff2511e..0704e4d 100644
--- a/arch/arm/include/asm/arch-tegra30/pinmux.h
+++ b/arch/arm/include/asm/arch-tegra30/pinmux.h
@@ -509,27 +509,6 @@ enum pmux_pin_ioreset {
 				(((ioreset) >= PMUX_PIN_IO_RESET_DEFAULT) && \
 				((ioreset) <= PMUX_PIN_IO_RESET_ENABLE))
 
-/* Available power domains used by pin groups */
-enum pmux_vddio {
-	PMUX_VDDIO_BB = 0,
-	PMUX_VDDIO_LCD,
-	PMUX_VDDIO_VI,
-	PMUX_VDDIO_UART,
-	PMUX_VDDIO_DDR,
-	PMUX_VDDIO_NAND,
-	PMUX_VDDIO_SYS,
-	PMUX_VDDIO_AUDIO,
-	PMUX_VDDIO_SD,
-	PMUX_VDDIO_CAM,
-	PMUX_VDDIO_GMI,
-	PMUX_VDDIO_PEXCTL,
-	PMUX_VDDIO_SDMMC1,
-	PMUX_VDDIO_SDMMC3,
-	PMUX_VDDIO_SDMMC4,
-
-	PMUX_VDDIO_NONE
-};
-
 #define PGRP_SLWF_NONE	-1
 #define PGRP_SLWF_MAX	3
 #define	PGRP_SLWR_NONE	PGRP_SLWF_NONE