diff options
author | Peng Fan <van.freenix@gmail.com> | 2016-08-11 14:02:48 +0800 |
---|---|---|
committer | Stefano Babic <sbabic@denx.de> | 2016-10-04 15:41:00 +0200 |
commit | bdfb2d4db2ab24e2eafeca55e494c5555909fcb5 (patch) | |
tree | 3e38a1494a41cc8c397999ee5d3e865238e53eec /arch/arm/include/asm | |
parent | 3974b7f6e020bd2d2399acdc96a56d6e55ae804f (diff) | |
download | u-boot-imx-bdfb2d4db2ab24e2eafeca55e494c5555909fcb5.zip u-boot-imx-bdfb2d4db2ab24e2eafeca55e494c5555909fcb5.tar.gz u-boot-imx-bdfb2d4db2ab24e2eafeca55e494c5555909fcb5.tar.bz2 |
imx: mx6ull: Update memory map address
Update memory map address for mx6ull.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'arch/arm/include/asm')
-rw-r--r-- | arch/arm/include/asm/arch-mx6/imx-regs.h | 17 |
1 files changed, 14 insertions, 3 deletions
diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index 53bf054..3bcb1a8 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -265,6 +265,7 @@ #define IP2APB_PERFMON1_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x44000) #define IP2APB_PERFMON2_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x48000) #define MX6UL_LCDIF1_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x48000) +#define MX6ULL_LCDIF1_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x48000) #ifdef CONFIG_MX6SX #define DEBUG_MONITOR_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x4C000) #else @@ -318,6 +319,14 @@ #define PWM6_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0xA8000) #define PWM7_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0xAC000) #define PWM8_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0xB0000) +#elif defined(CONFIG_MX6ULL) +#define AIPS3_CONFIG_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0x7C000) +#define DCP_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0x80000) +#define RNGB_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0x84000) +#define UART8_IPS_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0x88000) +#define EPDC_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0x8C000) +#define IOMUXC_SNVS_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0x90000) +#define SNVS_GPR_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0x94000) #endif /* Only for i.MX6SX */ #define LCDIF2_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0x24000) @@ -336,10 +345,12 @@ #include <asm/types.h> /* only for i.MX6SX/UL */ -#define WDOG3_BASE_ADDR ((is_cpu_type(MXC_CPU_MX6UL) ? \ +#define WDOG3_BASE_ADDR ((is_mx6ul() ? \ MX6UL_WDOG3_BASE_ADDR : MX6SX_WDOG3_BASE_ADDR)) -#define LCDIF1_BASE_ADDR ((is_cpu_type(MXC_CPU_MX6UL)) ? \ - MX6UL_LCDIF1_BASE_ADDR : MX6SX_LCDIF1_BASE_ADDR) +#define LCDIF1_BASE_ADDR ((is_mx6ul()) ? \ + MX6UL_LCDIF1_BASE_ADDR : \ + ((is_mx6ull()) ? \ + MX6ULL_LCDIF1_BASE_ADDR : MX6SX_LCDIF1_BASE_ADDR)) extern void imx_get_mac_from_fuse(int dev_id, unsigned char *mac); |