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authorYork Sun <york.sun@nxp.com>2016-09-26 08:09:26 -0700
committerYork Sun <york.sun@nxp.com>2016-09-26 08:53:07 -0700
commit9533acf36c8763af914edcff7c09573e160c1f4d (patch)
tree481c1ed0905c30acd83d49d09932318134b54077 /arch/arm/include/asm
parent1fdcc8dfc7612acc765cd483051dcfaac399f4f1 (diff)
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armv8: ls1012a: Convert CONFIG_LS1012A to Kconfig option ARCH_LS1021A
Move this config to Kconfig option and clean up existing uses. Signed-off-by: York Sun <york.sun@nxp.com> CC: Calvin Johnson <calvin.johnson@nxp.com> CC: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/arm/include/asm')
-rw-r--r--arch/arm/include/asm/arch-fsl-layerscape/config.h6
-rw-r--r--arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h2
2 files changed, 3 insertions, 5 deletions
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index e7c7d98..a7fda18 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -18,9 +18,7 @@
#define CONFIG_SYS_FSL_DDRC_ARM_GEN3 /* Enable Freescale ARM DDR3 driver */
#endif
-#ifdef CONFIG_LS1012A
-#define CONFIG_SYS_FSL_MMDC /* Freescale MMDC driver */
-#else
+#ifndef CONFIG_ARCH_LS1012A
#define CONFIG_SYS_FSL_DDR /* Freescale DDR driver */
#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_5_0
#endif
@@ -208,7 +206,7 @@
#define CONFIG_SYS_FSL_ERRATUM_A009942
#define CONFIG_SYS_FSL_ERRATUM_A009660
#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1
-#elif defined(CONFIG_LS1012A)
+#elif defined(CONFIG_ARCH_LS1012A)
#define CONFIG_MAX_CPUS 1
#undef CONFIG_SYS_FSL_DDRC_ARM_GEN3
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index 95a4293..df51871 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -60,7 +60,7 @@
#define CONFIG_SYS_PCIE2_PHYS_ADDR 0x4800000000ULL
#define CONFIG_SYS_PCIE3_PHYS_ADDR 0x5000000000ULL
/* LUT registers */
-#ifdef CONFIG_LS1012A
+#ifdef CONFIG_ARCH_LS1012A
#define PCIE_LUT_BASE 0xC0000
#else
#define PCIE_LUT_BASE 0x10000