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authorKuo-Jung Su <dantesu@faraday-tech.com>2013-07-29 13:51:43 +0800
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2013-09-14 12:08:00 +0200
commit771f74c3d31a265bae103b2b407286ec03a4589b (patch)
treeb0b3137f121cb24281d450872803646e250a963c /arch/arm/include/asm
parentfb8d49cb4492332066a2dc775ef3c57c49fd1eca (diff)
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arm: dma_alloc_coherent: malloc() -> memalign()
Even though the MMU/D-cache is off, some DMA engines still expect strict address alignment. For example, the incoming Faraday FTMAC110 & FTGMAC100 ethernet controllers expect the tx/rx descriptors should always be aligned to 16-bytes boundary. Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> CC: Albert ARIBAUD <albert.u.boot@aribaud.net>
Diffstat (limited to 'arch/arm/include/asm')
-rw-r--r--arch/arm/include/asm/dma-mapping.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h
index 009863b..55a4e26 100644
--- a/arch/arm/include/asm/dma-mapping.h
+++ b/arch/arm/include/asm/dma-mapping.h
@@ -16,7 +16,7 @@ enum dma_data_direction {
static void *dma_alloc_coherent(size_t len, unsigned long *handle)
{
- *handle = (unsigned long)malloc(len);
+ *handle = (unsigned long)memalign(ARCH_DMA_MINALIGN, len);
return (void *)*handle;
}