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| author | Hao Zhang <hzhang@ti.com> | 2014-10-22 16:32:33 +0300 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2014-10-23 11:27:05 -0400 |
| commit | 345af534561a2c111ef1160cb8f25ba787d7e949 (patch) | |
| tree | c60ed771f21b1def5c920dd6eafeb941dfa4ce38 /arch/arm/include/asm | |
| parent | b66604fb66c3e8fee5d294ac548d6da52fd1fae1 (diff) | |
| download | u-boot-imx-345af534561a2c111ef1160cb8f25ba787d7e949.zip u-boot-imx-345af534561a2c111ef1160cb8f25ba787d7e949.tar.gz u-boot-imx-345af534561a2c111ef1160cb8f25ba787d7e949.tar.bz2 | |
keystone2: k2l-evm: add board support
This patch adds Keystone II Lammar (K2L) EVM board support.
Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Diffstat (limited to 'arch/arm/include/asm')
| -rw-r--r-- | arch/arm/include/asm/arch-keystone/clock-k2l.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-keystone/clock-k2l.h b/arch/arm/include/asm/arch-keystone/clock-k2l.h index ad2e407..bb9a5c4 100644 --- a/arch/arm/include/asm/arch-keystone/clock-k2l.h +++ b/arch/arm/include/asm/arch-keystone/clock-k2l.h @@ -70,7 +70,9 @@ enum { #define CORE_PLL_799 {CORE_PLL, 13, 1, 2} #define CORE_PLL_983 {CORE_PLL, 16, 1, 2} +#define CORE_PLL_1000 {CORE_PLL, 114, 7, 2} #define CORE_PLL_1167 {CORE_PLL, 19, 1, 2} +#define CORE_PLL_1198 {CORE_PLL, 39, 2, 2} #define CORE_PLL_1228 {CORE_PLL, 20, 1, 2} #define PASS_PLL_1228 {PASS_PLL, 20, 1, 2} #define PASS_PLL_983 {PASS_PLL, 16, 1, 2} @@ -79,8 +81,12 @@ enum { #define TETRIS_PLL_737 {TETRIS_PLL, 12, 1, 2} #define TETRIS_PLL_799 {TETRIS_PLL, 13, 1, 2} #define TETRIS_PLL_983 {TETRIS_PLL, 16, 1, 2} +#define TETRIS_PLL_1000 {TETRIS_PLL, 114, 7, 2} #define TETRIS_PLL_1167 {TETRIS_PLL, 19, 1, 2} +#define TETRIS_PLL_1198 {TETRIS_PLL, 39, 2, 2} #define TETRIS_PLL_1228 {TETRIS_PLL, 20, 1, 2} +#define TETRIS_PLL_1352 {TETRIS_PLL, 22, 1, 2} +#define TETRIS_PLL_1401 {TETRIS_PLL, 114, 5, 2} #define DDR3_PLL_200 {DDR3_PLL, 4, 1, 2} #define DDR3_PLL_400 {DDR3_PLL, 16, 1, 4} #define DDR3_PLL_800 {DDR3_PLL, 16, 1, 2} |