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| author | Ye.Li <B37916@freescale.com> | 2014-06-11 16:15:08 +0800 |
|---|---|---|
| committer | Ye.Li <B37916@freescale.com> | 2014-06-17 11:13:57 +0800 |
| commit | 964b2672bfbec14629f5767e59e73fd3bb185e3a (patch) | |
| tree | ce587f1c0b9d4a7f32e26c8ef65cdd237bbc10f0 /arch/arm/include/asm/imx-common | |
| parent | 98c15deb3083d5dac7900c58e95f2ac2f422a4d3 (diff) | |
| download | u-boot-imx-964b2672bfbec14629f5767e59e73fd3bb185e3a.zip u-boot-imx-964b2672bfbec14629f5767e59e73fd3bb185e3a.tar.gz u-boot-imx-964b2672bfbec14629f5767e59e73fd3bb185e3a.tar.bz2 | |
ENGR00315894-58 RDC: Add an iMX platform driver for RDC-SEMA
The RDC driver provides interfaces for setting peripherals and masters
at BSP initialization, before using the peripherals driver. Another
interfaces for lock/unlock RDC semaphore and permission check.
The driver assumes boot CPU which runs u-boot is in Domain 0
(default setting on boot). Users should not set it to other domains.
The peripherals ID and masters ID may change on different chip, each
should provide definitions of the IDs and be included in "imx-rdc.h".
Signed-off-by: Ye.Li <B37916@freescale.com>
Diffstat (limited to 'arch/arm/include/asm/imx-common')
| -rw-r--r-- | arch/arm/include/asm/imx-common/rdc-sema.h | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/arch/arm/include/asm/imx-common/rdc-sema.h b/arch/arm/include/asm/imx-common/rdc-sema.h new file mode 100644 index 0000000..01ffab2 --- /dev/null +++ b/arch/arm/include/asm/imx-common/rdc-sema.h @@ -0,0 +1,35 @@ +/* + * Copyright (C) 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __RDC_SEMA_H__ +#define __RDC_SEMA_H__ + +typedef u32 rdc_peri_cfg_t; +typedef u32 rdc_ma_cfg_t; + +#define RDC_PERI_MASK 0xFF +#define RDC_PERI_SHIFT 0 + +#define RDC_DOMAIN_SHIFT_BASE 16 +#define RDC_DOMAIN_MASK 0xFF0000 +#define RDC_DOMAIN_SHIFT(x) (RDC_DOMAIN_SHIFT_BASE + ((x << 1))) +#define RDC_DOMAIN(x) ((rdc_peri_cfg_t)(0x3 << RDC_DOMAIN_SHIFT(x))) + +#define RDC_MASTER_SHIFT 8 +#define RDC_MASTER_MASK 0xFF00 +#define RDC_MASTER_CFG(master_id, domain_id) (rdc_ma_cfg_t)((master_id << 8) | (domain_id << RDC_DOMAIN_SHIFT_BASE)) + +int imx_rdc_check_permission(int per_id); +int imx_rdc_sema_lock(int per_id); +int imx_rdc_sema_unlock(int per_id); +int imx_rdc_setup_peri(rdc_peri_cfg_t p); +int imx_rdc_setup_peripherals(rdc_peri_cfg_t const *peripherals_list, + unsigned count); +int imx_rdc_setup_ma(rdc_ma_cfg_t p); +int imx_rdc_setup_masters(rdc_ma_cfg_t const *masters_list, + unsigned count); + +#endif /* __RDC_SEMA_H__*/ |