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| author | Lucas Stach <dev@lynxeye.de> | 2012-09-25 20:21:13 +0000 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2012-10-15 11:54:07 -0700 |
| commit | 65530a842eeaf7ad07e0613ac6f883f2f1f1e33f (patch) | |
| tree | 01e704c3bbf59d1c5f7be1ba55ae8dcf656a5128 /arch/arm/include/asm/arch-tegra20 | |
| parent | 3f44e44f33899821c4703c3bd5f9c117bb328e8b (diff) | |
| download | u-boot-imx-65530a842eeaf7ad07e0613ac6f883f2f1f1e33f.zip u-boot-imx-65530a842eeaf7ad07e0613ac6f883f2f1f1e33f.tar.gz u-boot-imx-65530a842eeaf7ad07e0613ac6f883f2f1f1e33f.tar.bz2 | |
tegra20: add clock_set_pllout function
Common practice on Tegra 2 boards is to use the pllp_out4 FO
to generate the ULPI reference clock. For this to work we have
to override the default hardware generated output divider.
This function adds a clean way to do so.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/arm/include/asm/arch-tegra20')
| -rw-r--r-- | arch/arm/include/asm/arch-tegra20/clock-tables.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-tegra20/clock-tables.h b/arch/arm/include/asm/arch-tegra20/clock-tables.h index f2b2769..53708e0 100644 --- a/arch/arm/include/asm/arch-tegra20/clock-tables.h +++ b/arch/arm/include/asm/arch-tegra20/clock-tables.h @@ -176,6 +176,13 @@ enum periph_id { PERIPH_ID_NONE = -1, }; +enum pll_out_id { + PLL_OUT1, + PLL_OUT2, + PLL_OUT3, + PLL_OUT4 +}; + /* Converts a clock number to a clock register: 0=L, 1=H, 2=U */ #define PERIPH_REG(id) ((id) >> 5) |