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author | Fabio Estevam <fabio.estevam@freescale.com> | 2014-01-29 17:39:49 -0200 |
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committer | Stefano Babic <sbabic@denx.de> | 2014-02-11 11:24:12 +0100 |
commit | 6d73c23410cd0f8a54227dd0361fb8b9eadcb4b2 (patch) | |
tree | 6e1b31648037762e47c487b94a271c14789d5c69 /arch/arm/include/asm/arch-tegra20/dc.h | |
parent | 4702c62dce3e2e2648ae3c8d002202211de8c92a (diff) | |
download | u-boot-imx-6d73c23410cd0f8a54227dd0361fb8b9eadcb4b2.zip u-boot-imx-6d73c23410cd0f8a54227dd0361fb8b9eadcb4b2.tar.gz u-boot-imx-6d73c23410cd0f8a54227dd0361fb8b9eadcb4b2.tar.bz2 |
mx6: Enable L2 cache support
Add L2 cache support and enable it by default.
Configure the L2 cache in the same way as done by FSL kernel:
http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/tree/arch/arm/mach-mx6/mm.c?h=imx_3.0.35_4.1.0
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Dirk Behme <dirk.behme@gmail.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'arch/arm/include/asm/arch-tegra20/dc.h')
0 files changed, 0 insertions, 0 deletions