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| author | Simon Glass <sjg@chromium.org> | 2012-04-19 08:04:39 +0000 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-07-07 14:07:19 +0200 |
| commit | 27c4a3318f716cce0a23248317534bda7792230b (patch) | |
| tree | 74daff034784a48106de6ca2a4bd814066279389 /arch/arm/include/asm/arch-tegra2/clock.h | |
| parent | 00a55add04222539846dd884217bcf40c504da92 (diff) | |
| download | u-boot-imx-27c4a3318f716cce0a23248317534bda7792230b.zip u-boot-imx-27c4a3318f716cce0a23248317534bda7792230b.tar.gz u-boot-imx-27c4a3318f716cce0a23248317534bda7792230b.tar.bz2 | |
tegra: Correct PLL access in ap20.c and clock.c
Correct this warning seen by Albert:
ap20.c:44:18: warning: array subscript is above array bounds
There is a subtle bug here which currently causes no errors, but might
in future if people use PCI or the 32KHz clock. So take the opportunity
to correct the logic now.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/arm/include/asm/arch-tegra2/clock.h')
| -rw-r--r-- | arch/arm/include/asm/arch-tegra2/clock.h | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/include/asm/arch-tegra2/clock.h b/arch/arm/include/asm/arch-tegra2/clock.h index 1d3ae38..ff83bbf 100644 --- a/arch/arm/include/asm/arch-tegra2/clock.h +++ b/arch/arm/include/asm/arch-tegra2/clock.h @@ -186,8 +186,9 @@ enum periph_id { /* Mask value for a clock (within PERIPH_REG(id)) */ #define PERIPH_MASK(id) (1 << ((id) & 0x1f)) -/* return 1 if a PLL ID is in range */ -#define clock_id_isvalid(id) ((id) >= CLOCK_ID_FIRST && (id) < CLOCK_ID_COUNT) +/* return 1 if a PLL ID is in range, and not a simple PLL */ +#define clock_id_is_pll(id) ((id) >= CLOCK_ID_FIRST && \ + (id) < CLOCK_ID_FIRST_SIMPLE) /* PLL stabilization delay in usec */ #define CLOCK_PLL_STABLE_DELAY_US 300 |