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| author | Tom Warren <twarren.nvidia@gmail.com> | 2013-02-08 07:25:30 +0000 |
|---|---|---|
| committer | Tom Warren <twarren@nvidia.com> | 2013-03-14 11:06:41 -0700 |
| commit | e32624ef820f821b94333402788e79979681eb29 (patch) | |
| tree | d328b83fe643568c319bd46c1c9458317f46ad3b /arch/arm/include/asm/arch-tegra/tegra_i2c.h | |
| parent | 702b87289438cfc3165408f0eaf999b0b67c1e7e (diff) | |
| download | u-boot-imx-e32624ef820f821b94333402788e79979681eb29.zip u-boot-imx-e32624ef820f821b94333402788e79979681eb29.tar.gz u-boot-imx-e32624ef820f821b94333402788e79979681eb29.tar.bz2 | |
Tegra: I2C: Add T114 clock support to tegra_i2c driver
T114 has a slightly different I2C clock, with a new (extra) divisor
in standard/fast mode and HS mode. Tested on my Dalmore, and the I2C
clock is 100KHz +/- 3Hz on my Saleae Logic analyzer.
Added a new entry in compat_names for T114 I2C since it differs
from the previous Tegra SoCs. A flag is set when T114 I2C HW is
found so new features like the extra clock divisor can be used.
Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Diffstat (limited to 'arch/arm/include/asm/arch-tegra/tegra_i2c.h')
| -rw-r--r-- | arch/arm/include/asm/arch-tegra/tegra_i2c.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-tegra/tegra_i2c.h b/arch/arm/include/asm/arch-tegra/tegra_i2c.h index 2650744..853e59b 100644 --- a/arch/arm/include/asm/arch-tegra/tegra_i2c.h +++ b/arch/arm/include/asm/arch-tegra/tegra_i2c.h @@ -105,6 +105,7 @@ struct i2c_ctlr { u32 sl_delay_count; /* 3C: I2C_I2C_SL_DELAY_COUNT */ u32 reserved_2[4]; /* 40: */ struct i2c_control control; /* 50 ~ 68 */ + u32 clk_div; /* 6C: I2C_I2C_CLOCK_DIVISOR */ }; /* bit fields definitions for IO Packet Header 1 format */ @@ -154,6 +155,11 @@ struct i2c_ctlr { #define I2C_INT_ARBITRATION_LOST_SHIFT 2 #define I2C_INT_ARBITRATION_LOST_MASK (1 << I2C_INT_ARBITRATION_LOST_SHIFT) +/* I2C_CLK_DIVISOR_REGISTER */ +#define CLK_DIV_STD_FAST_MODE 0x19 +#define CLK_DIV_HS_MODE 1 +#define CLK_MULT_STD_FAST_MODE 8 + /** * Returns the bus number of the DVC controller * |