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authorStephen Warren <swarren@nvidia.com>2015-02-24 14:08:25 -0700
committerTom Warren <twarren@nvidia.com>2015-03-04 10:08:59 -0700
commit439f57684e9fff3209f966365a18c328f858c623 (patch)
treeed493d9c6c9d1a77f80e3085e771ce19c684d6b9 /arch/arm/include/asm/arch-tegra/pinmux.h
parent7a28441f4d89cac6885a7e817e41379c83cb35aa (diff)
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ARM: tegra: pinmux: handle feature removal on newer SoCs
On some future SoCs, some of the per-drive-group features no longer exist. Add some ifdefs to support this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/arm/include/asm/arch-tegra/pinmux.h')
-rw-r--r--arch/arm/include/asm/arch-tegra/pinmux.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-tegra/pinmux.h b/arch/arm/include/asm/arch-tegra/pinmux.h
index c95c973..cb61aa1 100644
--- a/arch/arm/include/asm/arch-tegra/pinmux.h
+++ b/arch/arm/include/asm/arch-tegra/pinmux.h
@@ -142,6 +142,7 @@ void pinmux_config_pingrp_table(const struct pmux_pingrp_config *config,
#define PMUX_DRVDN_MAX 127
#define PMUX_DRVDN_NONE -1
+#ifdef TEGRA_PMX_GRPS_HAVE_LPMD
/* Defines a pin group cfg's low-power mode select */
enum pmux_lpmd {
PMUX_LPMD_X8 = 0,
@@ -150,20 +151,25 @@ enum pmux_lpmd {
PMUX_LPMD_X,
PMUX_LPMD_NONE = -1,
};
+#endif
+#ifdef TEGRA_PMX_GRPS_HAVE_SCHMT
/* Defines whether a pin group cfg's schmidt is enabled or not */
enum pmux_schmt {
PMUX_SCHMT_DISABLE = 0,
PMUX_SCHMT_ENABLE = 1,
PMUX_SCHMT_NONE = -1,
};
+#endif
+#ifdef TEGRA_PMX_GRPS_HAVE_HSM
/* Defines whether a pin group cfg's high-speed mode is enabled or not */
enum pmux_hsm {
PMUX_HSM_DISABLE = 0,
PMUX_HSM_ENABLE = 1,
PMUX_HSM_NONE = -1,
};
+#endif
/*
* This defines the configuration for a pin group's pad control config
@@ -174,9 +180,15 @@ struct pmux_drvgrp_config {
u32 slwr:3; /* rising edge slew */
u32 drvup:8; /* pull-up drive strength */
u32 drvdn:8; /* pull-down drive strength */
+#ifdef TEGRA_PMX_GRPS_HAVE_LPMD
u32 lpmd:3; /* low-power mode selection */
+#endif
+#ifdef TEGRA_PMX_GRPS_HAVE_SCHMT
u32 schmt:2; /* schmidt enable */
+#endif
+#ifdef TEGRA_PMX_GRPS_HAVE_HSM
u32 hsm:2; /* high-speed mode enable */
+#endif
};
/**