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author | Roy Spliet <r.spliet@ultimaker.com> | 2015-05-26 17:00:41 +0200 |
---|---|---|
committer | Hans de Goede <hdegoede@redhat.com> | 2015-05-29 13:46:36 +0200 |
commit | d0f4200392515194bf67213165be906e5b9e5748 (patch) | |
tree | e9545288dd85621ce1a7bbe76d00cb706e0d395f /arch/arm/include/asm/arch-sunxi/clock_sun9i.h | |
parent | a19e735d3cbf8fb50a69e911d107635be858c84f (diff) | |
download | u-boot-imx-d0f4200392515194bf67213165be906e5b9e5748.zip u-boot-imx-d0f4200392515194bf67213165be906e5b9e5748.tar.gz u-boot-imx-d0f4200392515194bf67213165be906e5b9e5748.tar.bz2 |
sunxi: Match sun4i, sun6i, sun9i CCI definitions for NAND and DMA
Make sure definitions for NAND clock and DMA gate bits are the same
across boards.
Signed-off-by: Roy Spliet <r.spliet@ultimaker.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Diffstat (limited to 'arch/arm/include/asm/arch-sunxi/clock_sun9i.h')
-rw-r--r-- | arch/arm/include/asm/arch-sunxi/clock_sun9i.h | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun9i.h b/arch/arm/include/asm/arch-sunxi/clock_sun9i.h index c506b0a..a61934f 100644 --- a/arch/arm/include/asm/arch-sunxi/clock_sun9i.h +++ b/arch/arm/include/asm/arch-sunxi/clock_sun9i.h @@ -42,7 +42,7 @@ struct sunxi_ccm_reg { u32 clk_output_b; /* 0x184 clk_output_a */ u8 reserved5[0x278]; /* 0x188 */ - u32 nand0_clk_cfg0; /* 0x400 nand0 clock configuration0 */ + u32 nand0_clk_cfg; /* 0x400 nand0 clock configuration0 */ u32 nand0_clk_cfg1; /* 0x404 nand1 clock configuration */ u8 reserved6[0x08]; /* 0x408 */ u32 sd0_clk_cfg; /* 0x410 sd0 clock configuration */ @@ -113,8 +113,12 @@ struct sunxi_ccm_reg { /* ahb_gate0 fields */ /* On sun9i all sdc-s share their ahb gate, so ignore (x) */ +#define AHB_GATE_OFFSET_NAND0 13 #define AHB_GATE_OFFSET_MMC(x) 8 +/* ahb gate1 field */ +#define AHB_GATE_OFFSET_DMA 24 + /* apb1_gate fields */ #define APB1_GATE_UART_SHIFT 16 #define APB1_GATE_UART_MASK (0xff << APB1_GATE_UART_SHIFT) |