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| author | Vikas Manocha <vikas.manocha@st.com> | 2015-07-02 18:29:40 -0700 |
|---|---|---|
| committer | Jagan Teki <jteki@openedev.com> | 2015-07-03 13:50:53 +0530 |
| commit | 54afb5002514f88c41f3d462d1e14715a40f4107 (patch) | |
| tree | 71eeed9270b7371134410e92702d02d5b6d8c81e /arch/arm/include/asm/arch-stv0991/stv0991_creg.h | |
| parent | f59fa3b1811370f979c80f46d839a09f60c49e43 (diff) | |
| download | u-boot-imx-54afb5002514f88c41f3d462d1e14715a40f4107.zip u-boot-imx-54afb5002514f88c41f3d462d1e14715a40f4107.tar.gz u-boot-imx-54afb5002514f88c41f3d462d1e14715a40f4107.tar.bz2 | |
stv0991: configure clock & pad muxing for qspi
stv0991 has cadence qspi controller for flash interfacing, this
patch configures the device pads & clock for the controller.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Jagannadh Teki <jteki@openedev.com>
Diffstat (limited to 'arch/arm/include/asm/arch-stv0991/stv0991_creg.h')
| -rw-r--r-- | arch/arm/include/asm/arch-stv0991/stv0991_creg.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-stv0991/stv0991_creg.h b/arch/arm/include/asm/arch-stv0991/stv0991_creg.h index c804eb5..737c952 100644 --- a/arch/arm/include/asm/arch-stv0991/stv0991_creg.h +++ b/arch/arm/include/asm/arch-stv0991/stv0991_creg.h @@ -49,6 +49,15 @@ struct stv0991_creg { u32 vdd_comp1; /* offset 0x400 */ }; +/* CREG MUX 13 register */ +#define FLASH_CS_NC_SHIFT 4 +#define FLASH_CS_NC_MASK ~(7 << FLASH_CS_NC_SHIFT) +#define CFG_FLASH_CS_NC (0 << FLASH_CS_NC_SHIFT) + +#define FLASH_CLK_SHIFT 0 +#define FLASH_CLK_MASK ~(7 << FLASH_CLK_SHIFT) +#define CFG_FLASH_CLK (0 << FLASH_CLK_SHIFT) + /* CREG MUX 12 register */ #define GPIOC_30_MUX_SHIFT 24 #define GPIOC_30_MUX_MASK ~(1 << GPIOC_30_MUX_SHIFT) |