diff options
| author | Minkyu Kang <mk7.kang@samsung.com> | 2010-11-02 14:09:18 +0900 |
|---|---|---|
| committer | Minkyu Kang <mk7.kang@samsung.com> | 2010-11-02 14:09:18 +0900 |
| commit | 37a3bda0c9c8a2ffbf7e2a9e121177a3385a0626 (patch) | |
| tree | 93439a245bc837bec3ec9e812b775ebed730c2fa /arch/arm/include/asm/arch-pxa/macro.h | |
| parent | d9abba8254c3e6b9a1d5c2e52c2d8088bbeb520f (diff) | |
| parent | 66fca016057b1c6b697552cc7220ebada9d4f82d (diff) | |
| download | u-boot-imx-37a3bda0c9c8a2ffbf7e2a9e121177a3385a0626.zip u-boot-imx-37a3bda0c9c8a2ffbf7e2a9e121177a3385a0626.tar.gz u-boot-imx-37a3bda0c9c8a2ffbf7e2a9e121177a3385a0626.tar.bz2 | |
Merge branch 'master' of git://git.denx.de/u-boot-arm
Diffstat (limited to 'arch/arm/include/asm/arch-pxa/macro.h')
| -rw-r--r-- | arch/arm/include/asm/arch-pxa/macro.h | 20 |
1 files changed, 12 insertions, 8 deletions
diff --git a/arch/arm/include/asm/arch-pxa/macro.h b/arch/arm/include/asm/arch-pxa/macro.h index 035a57e..85958dd 100644 --- a/arch/arm/include/asm/arch-pxa/macro.h +++ b/arch/arm/include/asm/arch-pxa/macro.h @@ -102,7 +102,11 @@ /* * This macro sets up the Memory controller of the PXA2xx CPU * - * Clobbered regs: r3, r4, r5 + * WARNING: This macro uses internally r3 and r7 regs for MEMC_BASE + * and CONFIG_SYS_MDREFR_VAL correspondingly. Please do not + * use this regs for other purpose inside this macro. + * + * Clobbered regs: r3, r4, r5, r6, r7 */ .macro pxa_mem_setup /* This comes handy when setting MDREFR */ @@ -157,7 +161,7 @@ bic r5, r5, #0xf00 /* MDREFR user config with zeroed DRI */ ldr r4, =CONFIG_SYS_MDREFR_VAL - mov r6, r4 + mov r7, r4 lsl r4, #20 lsr r4, #20 /* Get a valid DRI field */ @@ -187,12 +191,12 @@ * 6) Initialize SDRAM */ - bic r6, #MDREFR_SLFRSH - str r6, [r3, #MDREFR_OFFSET] + bic r7, #MDREFR_SLFRSH + str r7, [r3, #MDREFR_OFFSET] ldr r4, [r3, #MDREFR_OFFSET] - orr r6, #MDREFR_E1PIN - str r6, [r3, #MDREFR_OFFSET] + orr r7, #MDREFR_E1PIN + str r7, [r3, #MDREFR_OFFSET] ldr r4, [r3, #MDREFR_OFFSET] /* @@ -250,8 +254,8 @@ */ ldr r4, [r3, #MDREFR_OFFSET] - and r6, r6, #MDREFR_APD - orr r4, r4, r6 + and r7, r7, #MDREFR_APD + orr r4, r4, r7 str r4, [r3, #MDREFR_OFFSET] ldr r4, [r3, #MDREFR_OFFSET] .endm |