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author | Wolfgang Denk <wd@denx.de> | 2011-10-28 00:15:19 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2011-10-28 00:15:19 +0200 |
commit | 87a5d601031652293ec4b729fdb7ee01bbd940a8 (patch) | |
tree | 91ede3ee45b228736c1876a700024782d7bc2032 /arch/arm/include/asm/arch-pantheon | |
parent | 606a76f8ef479e42ae4d06f8f3ce87e9a1c72acf (diff) | |
parent | 37fc0ed268dc5acacd3a83adafa26eb1a84e90af (diff) | |
download | u-boot-imx-87a5d601031652293ec4b729fdb7ee01bbd940a8.zip u-boot-imx-87a5d601031652293ec4b729fdb7ee01bbd940a8.tar.gz u-boot-imx-87a5d601031652293ec4b729fdb7ee01bbd940a8.tar.bz2 |
Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm:
ARM: Add Calxeda Highbank platform
dkb: make mmc command as default enabled
Marvell: dkb: add mmc support
ARM: pantheon: add mmc definition
davinci: remove config.mk file from the sources
ARM:AM33XX: Add support for TI AM335X EVM
ARM:AM33XX: Added timer support
ARM:AM33XX: Add emif/ddr support
ARM:AM33XX: Add clock definitions
ARM:AM33XX: Added support for AM33xx
omap3/emif4: fix registers definition
davinci: remove obsolete macro CONFIG_EMAC_MDIO_PHY_NUM
davinci: emac: add support for more than 1 PHYs
davinci: emac: add new features to autonegotiate for EMAC
da850evm: Move LPSC configuration to board_early_init_f()
omap4_panda: Build in cmd_gpio support on panda
omap: Don't use gpio_free to change direction to input
mmc: omap: Allow OMAP_HSMMC[23]_BASE to be unset
OMAP3: overo : Add environment variable optargs to bootargs
OMAP3: overo: Move ethernet CS4 configuration to execute based on board id
OMAP3: overo : Use ttyO2 instead of ttyS2.
da830: add support for NAND boot mode
dm36x: revert cache disable patch
dm644X: revert cache disable patch
devkit8000: Add malloc space
omap: spl: fix build break due to changes in FAT
OMAP3 SPL: Provide weak omap_rev_string
omap: beagle: Use ubifs instead of jffs2 for nand boot
omap: overo: Disable pull-ups on camera PCLK, HS and VS signals
omap: overo: Configure mux for gpio10
SPL: Add DMA library
omap3: Add interface for omap3 DMA
omap3: Add DMA register accessors
omap3: Add Base register for DMA
arm, davinci: add missing LSPC define for MMC/SD1
U-Boot/SPL: omap4: Make ddr pre-calculated timings as default.
DaVinci: correct MDSTAT.STATE mask
omap4: splitting padconfs into common, 4430 and 4460
omap4: adding revision detection for 4460 ES1.1
omap4: replacing OMAP4_CONTROL with OMAP4430_CONTROL
gplug: fixed build error as a result of code cleanup patch
kirkwood_spi: add dummy spi_init()
gpio: mvmfp: reduce include platform file
ARM: orion5x: reduce dependence of including platform file
serial: reduce include platform file for marvell chip
ARM: kirkwood: reduce dependence of including platform file
ARM: armada100: reduce dependence of including platform file
ARM: pantheon: reduce dependence of including platform file
Armada100: Add env storage support for Marvell gplugD
Armada100: Add SPI flash support for Marvell gplugD
Armada100: Add SPI support for Marvell gplugD
SPI: Add SPI driver support for Marvell Armada100
dreamplug: initial board support.
imx: fix coding style
misc: pmic: drop old Freescale's pmic driver
MX31: mx31pdk: use new pmic driver
MX31: mx31ads: use new pmic driver
MX31: mx31_litekit: use new pmic driver
MX5: mx53evk: use new pmic driver
MX5: mx51evk: use new pmic driver
MX35: mx35pdk: use new pmic driver
misc: pmic: addI2C support to pmic_fsl driver
misc: pmic: use I2C_SET_BUS in pmic I2C
MX5: efikamx/efikasb: use new pmic driver
MX3: qong: use new pmic driver
RTC: Switch mc13783 to generic pmic code
MX5: vision2: use new pmic driver
misc: pmic: Freescale PMIC switches to generic PMIC driver
misc:pmic:samsung Enable PMIC driver at GONI target
misc:pmic:max8998 MAX8998 support at a new PMIC driver.
misc:pmic:core New generic PMIC driver
mx31pdk: Remove unneeded config
mx31: provide readable WEIM CS accessor
MX51: vision2: Set global macros
I2C: Add i2c_get/set_speed() to mxc_i2c.c
ARM: Update mach-types
devkit8000: Add config to enable SPL MMC boot
devkit8000: protect board_mmc_init
arm, post: add missing post_time_ms for arm
cosmetic, post: Codingstyle cleanup
arm, logbuffer: make it compileclean
tegra2: Enable MMC for Seaboard
tegra2: Add more pinmux functions
tegra2: Rename PIN_ to PINGRP_
tegra2: Add more clock functions
tegra2: Clean up board code a little
tegra2: Rename CLOCK_PLL_ID to CLOCK_ID
Diffstat (limited to 'arch/arm/include/asm/arch-pantheon')
-rw-r--r-- | arch/arm/include/asm/arch-pantheon/config.h | 20 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-pantheon/cpu.h | 12 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-pantheon/mfp.h | 12 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-pantheon/pantheon.h | 14 |
4 files changed, 51 insertions, 7 deletions
diff --git a/arch/arm/include/asm/arch-pantheon/config.h b/arch/arm/include/asm/arch-pantheon/config.h index 5658592..d10583d 100644 --- a/arch/arm/include/asm/arch-pantheon/config.h +++ b/arch/arm/include/asm/arch-pantheon/config.h @@ -25,6 +25,8 @@ #ifndef _PANTHEON_CONFIG_H #define _PANTHEON_CONFIG_H +#include <asm/arch/pantheon.h> + #define CONFIG_ARM926EJS 1 /* Basic Architecture */ #define CONFIG_SYS_TCLK (14745600) /* NS16550 clk config */ @@ -45,4 +47,22 @@ #define CONFIG_SYS_I2C_SLAVE 0xfe #endif +/* + * MMC definition + */ +#ifdef CONFIG_CMD_MMC +#define CONFIG_CMD_FAT 1 +#define CONFIG_MMC 1 +#define CONFIG_GENERIC_MMC 1 +#define CONFIG_SDHCI 1 +#define CONFIG_MMC_SDHCI_IO_ACCESSORS 1 +#define CONFIG_SYS_MMC_MAX_BLK_COUNT 0x1000 +#define CONFIG_MMC_SDMA 1 +#define CONFIG_MV_SDHCI 1 +#define CONFIG_DOS_PARTITION 1 +#define CONFIG_EFI_PARTITION 1 +#define CONFIG_SYS_MMC_NUM 2 +#define CONFIG_SYS_MMC_BASE {0xD4280000, 0xd4281000} +#endif + #endif /* _PANTHEON_CONFIG_H */ diff --git a/arch/arm/include/asm/arch-pantheon/cpu.h b/arch/arm/include/asm/arch-pantheon/cpu.h index 60955c5..94e8371 100644 --- a/arch/arm/include/asm/arch-pantheon/cpu.h +++ b/arch/arm/include/asm/arch-pantheon/cpu.h @@ -43,6 +43,17 @@ struct panthmpmu_registers { }; /* + * Application Power Management (APMU) Registers + * Refer Register Datasheet 9.2 + */ +struct panthapmu_registers { + u8 pad0[0x0054]; + u32 sd1; /*0x0054*/ + u8 pad1[0x00e0 - 0x054 - 4]; + u32 sd3; /*0x00e0*/ +}; + +/* * APB Clock Reset/Control Registers * Refer Register Datasheet 6.14 */ @@ -77,5 +88,6 @@ struct panthcpu_registers { */ u32 panth_sdram_base(int); u32 panth_sdram_size(int); +int mv_sdh_init(u32 regbase, u32 max_clk, u32 min_clk, u32 quirks); #endif /* _PANTHEON_CPU_H */ diff --git a/arch/arm/include/asm/arch-pantheon/mfp.h b/arch/arm/include/asm/arch-pantheon/mfp.h index e939196..b868ab8 100644 --- a/arch/arm/include/asm/arch-pantheon/mfp.h +++ b/arch/arm/include/asm/arch-pantheon/mfp.h @@ -38,6 +38,18 @@ #define MFP54_CI2C_SDA (MFP_REG(0x1b4) | MFP_AF2 | MFP_DRIVE_MEDIUM) /* More macros can be defined here... */ +#define MFP_MMC1_DAT7 (MFP_REG(0x84) | MFP_AF0 | MFP_DRIVE_MEDIUM) +#define MFP_MMC1_DAT6 (MFP_REG(0x88) | MFP_AF0 | MFP_DRIVE_MEDIUM) +#define MFP_MMC1_DAT5 (MFP_REG(0x8c) | MFP_AF0 | MFP_DRIVE_MEDIUM) +#define MFP_MMC1_DAT4 (MFP_REG(0x90) | MFP_AF0 | MFP_DRIVE_MEDIUM) +#define MFP_MMC1_DAT3 (MFP_REG(0x94) | MFP_AF0 | MFP_DRIVE_FAST) +#define MFP_MMC1_DAT2 (MFP_REG(0x98) | MFP_AF0 | MFP_DRIVE_FAST) +#define MFP_MMC1_DAT1 (MFP_REG(0x9c) | MFP_AF0 | MFP_DRIVE_FAST) +#define MFP_MMC1_DAT0 (MFP_REG(0xa0) | MFP_AF0 | MFP_DRIVE_FAST) +#define MFP_MMC1_CMD (MFP_REG(0xa4) | MFP_AF0 | MFP_DRIVE_FAST) +#define MFP_MMC1_CLK (MFP_REG(0xa8) | MFP_AF0 | MFP_DRIVE_FAST) +#define MFP_MMC1_CD (MFP_REG(0xac) | MFP_AF0 | MFP_DRIVE_MEDIUM) +#define MFP_MMC1_WP (MFP_REG(0xb0) | MFP_AF0 | MFP_DRIVE_MEDIUM) #define MFP_PIN_MAX 117 #endif diff --git a/arch/arm/include/asm/arch-pantheon/pantheon.h b/arch/arm/include/asm/arch-pantheon/pantheon.h index e4ed087..d5e9ba0 100644 --- a/arch/arm/include/asm/arch-pantheon/pantheon.h +++ b/arch/arm/include/asm/arch-pantheon/pantheon.h @@ -25,13 +25,6 @@ #ifndef _PANTHEON_H #define _PANTHEON_H -#ifndef __ASSEMBLY__ -#include <asm/types.h> -#include <asm/io.h> -#endif /* __ASSEMBLY__ */ - -#include <asm/arch/cpu.h> - /* Common APB clock register bit definitions */ #define APBC_APBCLK (1<<0) /* APB Bus Clock Enable */ #define APBC_FNCLK (1<<1) /* Functional Clock Enable */ @@ -39,6 +32,12 @@ /* Functional Clock Selection Mask */ #define APBC_FNCLKSEL(x) (((x) & 0xf) << 4) +/* Common APMU register bit definitions */ +#define APMU_PERI_CLK (1<<4) /* Peripheral Clock Enable */ +#define APMU_AXI_CLK (1<<3) /* AXI Clock Enable*/ +#define APMU_PERI_RST (1<<1) /* Peripheral Reset */ +#define APMU_AXI_RST (1<<0) /* AXI Reset */ + /* Register Base Addresses */ #define PANTHEON_DRAM_BASE 0xB0000000 #define PANTHEON_TIMER_BASE 0xD4014000 @@ -49,6 +48,7 @@ #define PANTHEON_GPIO_BASE 0xD4019000 #define PANTHEON_MFPR_BASE 0xD401E000 #define PANTHEON_MPMU_BASE 0xD4050000 +#define PANTHEON_APMU_BASE 0xD4282800 #define PANTHEON_CPU_BASE 0xD4282C00 #endif /* _PANTHEON_H */ |