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author | Peng Fan <peng.fan@nxp.com> | 2017-02-22 16:21:43 +0800 |
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committer | Ye Li <ye.li@nxp.com> | 2017-04-05 17:23:51 +0800 |
commit | cd20f2afe2da42a98a4071dedb86590f0d53bd21 (patch) | |
tree | 5b7670e0797fc63e5df0fa443ea998e3ed96e285 /arch/arm/include/asm/arch-orion5x/spl.h | |
parent | 626c8a6df5bea994aa821bb3a318a99634a4fbcc (diff) | |
download | u-boot-imx-cd20f2afe2da42a98a4071dedb86590f0d53bd21.zip u-boot-imx-cd20f2afe2da42a98a4071dedb86590f0d53bd21.tar.gz u-boot-imx-cd20f2afe2da42a98a4071dedb86590f0d53bd21.tar.bz2 |
imx: mx7ulp: Add soc level initialization codes and functions
Implement soc level functions to get cpu rev, reset cause, enable cache,
etc. We will disable the wdog and init clocks in s_init at very early u-boot
phase.
Since the we are seeking the way to get chip id for mx7ulp, the get_cpu_rev
is hard coded to a fixed value. This may change in future.
Reuse some code in imx-common.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'arch/arm/include/asm/arch-orion5x/spl.h')
0 files changed, 0 insertions, 0 deletions