diff options
| author | Govindraj.R <govindraj.raja@ti.com> | 2012-02-06 03:55:34 +0000 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-02-12 10:11:31 +0100 |
| commit | 43b62393da6dfdd7f503d1b37344463a05ea47b5 (patch) | |
| tree | 31e528357b55cc7b130c1e9c0d15e46238c49c06 /arch/arm/include/asm/arch-omap3 | |
| parent | 29321c0518d99494ab2a250e5b4f75b3add83b11 (diff) | |
| download | u-boot-imx-43b62393da6dfdd7f503d1b37344463a05ea47b5.zip u-boot-imx-43b62393da6dfdd7f503d1b37344463a05ea47b5.tar.gz u-boot-imx-43b62393da6dfdd7f503d1b37344463a05ea47b5.tar.bz2 | |
ehci-omap: Clean up added ehci-omap.c
Clean up added ehci-omap.c and make it generic for re-use across
omap-soc having same ehci ip block. Also pass the modes to be configured
from board file and configure the ports accordingly. All usb layers
are not cache aligned, till then keep cache off for usb ops as ehci will use
internally dma for all usb ops.
* Add a generic common header ehci-omap.h having common ip block
data and reg shifts.
* Rename and modify ehci-omap3 to ehci.h retain only conflicting
sysc reg shifts remove others and move to common header file.
* pass the board data for beagle/panda accordinly to use
ehci ports.
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Diffstat (limited to 'arch/arm/include/asm/arch-omap3')
| -rw-r--r-- | arch/arm/include/asm/arch-omap3/ehci.h (renamed from arch/arm/include/asm/arch-omap3/ehci_omap3.h) | 45 |
1 files changed, 21 insertions, 24 deletions
diff --git a/arch/arm/include/asm/arch-omap3/ehci_omap3.h b/arch/arm/include/asm/arch-omap3/ehci.h index cd01f50..0f73d20 100644 --- a/arch/arm/include/asm/arch-omap3/ehci_omap3.h +++ b/arch/arm/include/asm/arch-omap3/ehci.h @@ -24,35 +24,32 @@ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, * MA 02110-1301 USA */ -#ifndef _EHCI_OMAP3_H_ -#define _EHCI_OMAP3_H_ +#ifndef _OMAP3_EHCI_H_ +#define _OMAP3_EHCI_H_ /* USB/EHCI registers */ -#define OMAP3_USBTLL_BASE 0x48062000UL -#define OMAP3_UHH_BASE 0x48064000UL -#define OMAP3_EHCI_BASE 0x48064800UL +#define OMAP_USBTLL_BASE 0x48062000UL +#define OMAP_UHH_BASE 0x48064000UL +#define OMAP_EHCI_BASE 0x48064800UL /* TLL Register Set */ -#define OMAP_USBTLL_SYSCONFIG (0x10) -#define OMAP_USBTLL_SYSCONFIG_SOFTRESET (1 << 1) -#define OMAP_USBTLL_SYSCONFIG_ENAWAKEUP (1 << 2) -#define OMAP_USBTLL_SYSCONFIG_SIDLEMODE (1 << 3) -#define OMAP_USBTLL_SYSCONFIG_CACTIVITY (1 << 8) - -#define OMAP_USBTLL_SYSSTATUS (0x14) -#define OMAP_USBTLL_SYSSTATUS_RESETDONE (1 << 0) +#define OMAP_USBTLL_SYSCONFIG_SOFTRESET (1 << 1) +#define OMAP_USBTLL_SYSCONFIG_ENAWAKEUP (1 << 2) +#define OMAP_USBTLL_SYSCONFIG_SIDLEMODE (1 << 3) +#define OMAP_USBTLL_SYSCONFIG_CACTIVITY (1 << 8) +#define OMAP_USBTLL_SYSSTATUS_RESETDONE 1 /* UHH Register Set */ -#define OMAP_UHH_SYSCONFIG (0x10) -#define OMAP_UHH_SYSCONFIG_SOFTRESET (1 << 1) -#define OMAP_UHH_SYSCONFIG_CACTIVITY (1 << 8) -#define OMAP_UHH_SYSCONFIG_SIDLEMODE (1 << 3) -#define OMAP_UHH_SYSCONFIG_ENAWAKEUP (1 << 2) -#define OMAP_UHH_SYSCONFIG_MIDLEMODE (1 << 12) +#define OMAP_UHH_SYSCONFIG_SOFTRESET (1 << 1) +#define OMAP_UHH_SYSCONFIG_CACTIVITY (1 << 8) +#define OMAP_UHH_SYSCONFIG_SIDLEMODE (1 << 3) +#define OMAP_UHH_SYSCONFIG_ENAWAKEUP (1 << 2) +#define OMAP_UHH_SYSCONFIG_MIDLEMODE (1 << 12) +#define OMAP_UHH_SYSSTATUS_EHCI_RESETDONE (1 << 2) -#define OMAP_UHH_HOSTCONFIG (0x40) -#define OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN (1 << 2) -#define OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN (1 << 3) -#define OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN (1 << 4) +#define OMAP_UHH_SYSCONFIG_VAL (OMAP_UHH_SYSCONFIG_CACTIVITY | \ + OMAP_UHH_SYSCONFIG_SIDLEMODE | \ + OMAP_UHH_SYSCONFIG_ENAWAKEUP | \ + OMAP_UHH_SYSCONFIG_MIDLEMODE) -#endif /* _EHCI_OMAP3_H_ */ +#endif /* _OMAP3_EHCI_H_ */ |